search for: at_64

Displaying 3 results from an estimated 3 matches for "at_64".

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2012 Jan 31
4
[LLVMdev] (MC) Register parsing for AsmParser (standalone assembler)
...ster names that are context sensitive. For instance, the 32 general purpose registers for both Mips32 and Mips64 have the same name, but each of the Mips32 registers are just a subregister in their Mips64 instance. def AT : MipsGPRReg< 1, "AT">, DwarfRegNum<[1]>; def AT_64 : Mips64GPRReg< 1, "AT", [AT]>; It gets more interesting with floating point where we have 3 different configurations, single precision, double precision aliased with single precision pair and straight double point precision. All of which share the same register name. /// Mi...
2012 Feb 02
0
[LLVMdev] (MC) Register parsing for AsmParser (standalone assembler)
...t sensitive. > > For instance, the 32 general purpose registers for both Mips32 and Mips64 have the same name, but each of the Mips32 registers are just a subregister in their Mips64 instance. > > def AT : MipsGPRReg< 1, "AT">, DwarfRegNum<[1]>; > def AT_64 : Mips64GPRReg< 1, "AT", [AT]>; > > It gets more interesting with floating point where we have 3 different configurations, single precision, double precision aliased with single precision pair and straight double point precision. All of which share the same register name....
2012 Feb 03
0
[LLVMdev] (MC) Register parsing for AsmParser (standalone assembler)
...t sensitive. > > For instance, the 32 general purpose registers for both Mips32 and Mips64 have the same name, but each of the Mips32 registers are just a subregister in their Mips64 instance. > > def AT : MipsGPRReg< 1, "AT">, DwarfRegNum<[1]>; > def AT_64 : Mips64GPRReg< 1, "AT", [AT]>; > > It gets more interesting with floating point where we have 3 different configurations, single precision, double precision aliased with single precision pair and straight double point precision. All of which share the same register name....