Displaying 2 results from an estimated 2 matches for "astc_2d_10x6".
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astc_2d_10x5
2015 Dec 19
2
[PATCH] nvc0: add hardware ETC2 and ASTC support where possible
...STC_2D_5X5 0x41
+#define NV50_TIC_0_FMT_ASTC_2D_6X5 0x51
+#define NV50_TIC_0_FMT_ASTC_2D_6X6 0x42
+#define NV50_TIC_0_FMT_ASTC_2D_8X5 0x55
+#define NV50_TIC_0_FMT_ASTC_2D_8X6 0x52
+#define NV50_TIC_0_FMT_ASTC_2D_8X8 0x44
+#define NV50_TIC_0_FMT_ASTC_2D_10X5 0x56
+#define NV50_TIC_0_FMT_ASTC_2D_10X6 0x57
+#define NV50_TIC_0_FMT_ASTC_2D_10X8 0x53
+#define NV50_TIC_0_FMT_ASTC_2D_10X10 0x45
+#define NV50_TIC_0_FMT_ASTC_2D_12X10 0x54
+#define NV50_TIC_0_FMT_ASTC_2D_12X12 0x46
+
#if NOUVEAU_DRIVER == 0xc0
# define NVXX_3D_VAF_SIZE(s) NVC0_3D_VERTEX_ATTRIB_FORMAT_SIZE_##s
# define NVXX_3D_VAF_T...
2015 Dec 19
0
[PATCH] nvc0: add hardware ETC2 and ASTC support where possible
...0_TIC_0_FMT_ASTC_2D_6X5 0x51
> +#define NV50_TIC_0_FMT_ASTC_2D_6X6 0x42
> +#define NV50_TIC_0_FMT_ASTC_2D_8X5 0x55
> +#define NV50_TIC_0_FMT_ASTC_2D_8X6 0x52
> +#define NV50_TIC_0_FMT_ASTC_2D_8X8 0x44
> +#define NV50_TIC_0_FMT_ASTC_2D_10X5 0x56
> +#define NV50_TIC_0_FMT_ASTC_2D_10X6 0x57
> +#define NV50_TIC_0_FMT_ASTC_2D_10X8 0x53
> +#define NV50_TIC_0_FMT_ASTC_2D_10X10 0x45
> +#define NV50_TIC_0_FMT_ASTC_2D_12X10 0x54
> +#define NV50_TIC_0_FMT_ASTC_2D_12X12 0x46
> +
> #if NOUVEAU_DRIVER == 0xc0
> # define NVXX_3D_VAF_SIZE(s) NVC0_3D_VERTEX_ATTRIB_FORM...