Displaying 2 results from an estimated 2 matches for "assemblyparsers".
2016 Jul 15
2
TableGen change in LLVM 3.9 allows only prefix instruction notation
Hello.
I am curious why did you changed TableGen to allow in principle only writing ASM
instructions in prefix notation. I ask because I personally use an assembly notation that
is infix (I could use a simple preprocessor that changes prefix to infix).
Just to mention: I found the solution to this - the following part of the code is
responsible for this from
2012 Jul 16
3
[LLVMdev] RFC: LLVM incubation, or requirements for committing new backends
...+ string CommentDelimiter = ";";
> +
> + string RegisterPrefix = "r";
> +
> +}
> +
> +
> +def AMDIL : Target {
> + // Pull in Instruction Info:
> + let InstructionSet = AMDILInstrInfo;
> + let AssemblyWriters = [AMDILAsmWriter];
> + let AssemblyParsers = [AMDILAsmParser];
> +}
>
> Added: llvm/trunk/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp?rev=160270&view=auto
> =====================================================================...