Displaying 3 results from an estimated 3 matches for "assemblerpredicate".
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assemblerpredicates
2020 Feb 13
2
[RFC] Extension to TableGen's AssemblerPredicates to support combining features with ORs
Hi,
I'd like to propose extending the supported syntax for
AssemblerPredicates to allow sets of SubtargetFeatures to be listed, but
where only one in the list has to be enabled for the predicate to be true.
The condition string which forms a AssemblerPredicate already allows
multiple features to be defined, separated by commas, and this means all
of these features must be p...
2015 Dec 05
2
Question about Decoding Conflict of DisassemblerTables from TableGen
Hi All,
I have faced decoding conflict of DisassemblerTables from TableGen. I
have instructions with same encoding and different mnemonic among
different architecture versions. I have used Predicates and
AssemblerPredicates to distinguish them on Codegen and Assembler but
it does not work on Disassembler. When I look at
TableGen/FixedLenDecoderEmitter.cpp, once there is decoding conflict,
tablegen does not generate table entry. I think it means even though
there are predicates, it does not affect to the table entry....
2014 Jul 09
2
[LLVMdev] How to resolve decoding conflict?
...reuse as much as possible from the
existing PPC backend. My first goal is to target a VLE only core and
my strategy so far has been to mark my VLE instructions with a
predicate to require VLE support from the sub target.
Example:
def HasVLE : Predicate<"PPCSubTarget->hasVLE()">,
AssemblerPredicate<"FeatureVLE", "VLE Instruction set">;
let Predicates = [HasVLE] in {
If I have understood this correct the predicate will work for CodeGen
and the assembler but not for the disassembler. This has worked for
the instructions added up until now when I added an instruction...