search for: asmtoken

Displaying 17 results from an estimated 17 matches for "asmtoken".

2010 Jun 21
2
[LLVMdev] MC: Object file specific parsing
...DirectiveInclude(); // ".include" @@ -159,6 +151,19 @@ private: /// ParseEscapedString - Parse the current token as a string which may include /// escaped characters and return the string contents. bool ParseEscapedString(std::string &Data); + + + virtual bool ParseDirective(AsmToken DirectiveID) { + assert(0 && "ParseDirective must be implemented by a subclass"); + }; + + // ParseTargetDirective - Parse a target-specific assembler directive. + virtual bool ParseTargetDirective(AsmToken DirectiveID) { + assert(0 && "ParseTargetDirective m...
2015 Sep 28
3
Parse Instruction
...rated and > I am having a bit of problem. > In *ParseInstruction* function, I don't know what is the easiest > way to figure out how many operands a mnemonic expected to have. > In comma-separated assembly code, it just consuming commas (while > (getLexer().is(AsmToken::Comma))) and adds operands, but it's not > the case for space... > > I have a dirty hack, that I manually provide such information > (number of operands) in a function called for example > getMnemonicAcceptInfo and with a for loop I parse the operand!! > >...
2013 Nov 12
2
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
...ctor<const MCExpr*> EntryVecTy; Use a SmallVector here? + MCSymbol *getLabel() {return Label;} + size_t getNumEntries() {return Entries.size();} + const MCExpr *getEntry(size_t Num) {return Entries[Num];} These can be const. + int64_t ConstantPoolCounter; This can be unsigned. + case AsmToken::Equal: { + const MCSection *Section = getParser().getStreamer().getCurrentSection().first; + assert(Section); We should probably check here that the mnemonic is actually 'ldr', e.g. see the AsmToken::Identifier case. +@ RUN: clang -target arm -integrated-as -c %s -o %t1 2> %t2; e...
2010 May 05
0
[LLVMdev] Is the option --enable-shared discontinued in 2.7?
...: Entering directory `/tmp/llvm-build/2.7/llvm-objects/tools/llvm-shlib' llvm[1]: Linking Release Shared Library LLVM-2.7.so /tmp/llvm-build/2.7/llvm-objects/Release/lib/libLLVMARMAsmParser.a(ARMAsmParser.o)(.text+0x135): In function `(anonymous namespace)::ARMAsmParser::ParseDirective(llvm::AsmToken)': : undefined reference to `__assert' /tmp/llvm-build/2.7/llvm-objects/Release/lib/libLLVMARMAsmParser.a(ARMAsmParser.o)(.text+0x3e3): In function `(anonymous namespace)::ARMAsmParser::ParseDirective(llvm::AsmToken)': : undefined reference to `__assert' /tmp/llvm-build/2.7/llvm-o...
2018 Sep 28
3
error: expected memory with 32-bit signed offset
...gslbx           $2,0($3,$4) It is equivalent to: dadd $1, $3, $4 lb $2,0($1) I just use  mem_simmptr  as the default value of  DAGOperand MO , because  MipsMemAsmOperand  use  parseMemOperand  to parse general  MemOffset  and only *one*  AnyRegister , for example: 0($1) But  Comma  isNot  AsmToken::RParen , for example: 0($3,$4) Then llvm-mc thrown such error: test/MC/Mips/loongson3a/valid.s:32:32: error: ')' expected         gslbx           $2,0($3,$4)                                           ^ test/MC/Mips/loongson3a/valid.s:32:32: error: unexpected token in argument list  ...
2013 Nov 12
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
...Vector here? > > + MCSymbol *getLabel() {return Label;} > + size_t getNumEntries() {return Entries.size();} const MCExpr > + *getEntry(size_t Num) {return Entries[Num];} > These can be const. > > + int64_t ConstantPoolCounter; > This can be unsigned. > > + case AsmToken::Equal: { > + const MCSection *Section = > getParser().getStreamer().getCurrentSection().first; > + assert(Section); > We should probably check here that the mnemonic is actually 'ldr', e.g. > see the AsmToken::Identifier case. > > +@ RUN: clang -target arm -inte...
2010 May 04
3
[LLVMdev] Is the option --enable-shared discontinued in 2.7?
On Thu, Apr 29, 2010 at 6:31 PM, Jeffrey Yasskin <jyasskin at google.com> wrote: > On Wed, Apr 28, 2010 at 10:48 AM, Yuri <yuri at tsoft.com> wrote: >> Jeffrey Yasskin wrote: >>> >>> We currently use two different techniques to get whole libraries >>> included into the .so. On Linux (gnu ld and gold), we pass >>> --whole-archive, while on
2015 Sep 28
2
Parse Instruction
...to parse an assembly code that is space-separated and I am having a bit of problem. In *ParseInstruction* function, I don't know what is the easiest way to figure out how many operands a mnemonic expected to have. In comma-separated assembly code, it just consuming commas (while (getLexer().is(AsmToken::Comma))) and adds operands, but it's not the case for space... I have a dirty hack, that I manually provide such information (number of operands) in a function called for example getMnemonicAcceptInfo and with a for loop I parse the operand!! What would you suggest for parsing space-separate...
2013 Nov 16
2
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
...etLabel() {return Label;} size_t getNumEntries() > > + {return Entries.size();} const MCExpr *getEntry(size_t Num) {return > > + Entries[Num];} > > These can be const. > > > > + int64_t ConstantPoolCounter; > > This can be unsigned. > > > > + case AsmToken::Equal: { > > + const MCSection *Section = > > getParser().getStreamer().getCurrentSection().first; > > + assert(Section); > > We should probably check here that the mnemonic is actually 'ldr', e.g. > > see the AsmToken::Identifier case. > > > &g...
2010 May 05
2
[LLVMdev] Is the option --enable-shared discontinued in 2.7?
...gt; `/tmp/llvm-build/2.7/llvm-objects/tools/llvm-shlib' > llvm[1]: Linking Release Shared Library LLVM-2.7.so > /tmp/llvm-build/2.7/llvm-objects/Release/lib/libLLVMARMAsmParser.a(ARMAsmParser.o)(.text+0x135): > In function `(anonymous > namespace)::ARMAsmParser::ParseDirective(llvm::AsmToken)': > : undefined reference to `__assert' > /tmp/llvm-build/2.7/llvm-objects/Release/lib/libLLVMARMAsmParser.a(ARMAsmParser.o)(.text+0x3e3): > In function `(anonymous > namespace)::ARMAsmParser::ParseDirective(llvm::AsmToken)': > : undefined reference to `__assert' &gt...
2013 Nov 11
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
I have attached an initial patch that implements the ldr pseudo. It still needs some clean up and more tests, but I would like some feedback on the approach I used and if there are any objections to implementing it this way. Here is my approach: Add a finishParse() callback to the target asm parser This callback is invoked when the parse has finished successfully. It will be used to write out
2013 Dec 17
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
...size_t getNumEntries() >>> + {return Entries.size();} const MCExpr *getEntry(size_t Num) {return >>> + Entries[Num];} >>> These can be const. >>> >>> + int64_t ConstantPoolCounter; >>> This can be unsigned. >>> >>> + case AsmToken::Equal: { >>> + const MCSection *Section = >>> getParser().getStreamer().getCurrentSection().first; >>> + assert(Section); >>> We should probably check here that the mnemonic is actually 'ldr', e.g. >>> see the AsmToken::Identifier case. &g...
2010 Apr 03
0
[LLVMdev] ARM AsmLexer
The attached patch implements simple target-specific AsmLexers for ARM and Thumb. They are shallow subclasses of a common tokenizer that uses a std::map of register names to IDs to recognize register names, and reports those as AsmToken::Register tokens instead of identifiers. I intend to use the ARM and Thumb AsmLexers as part of an extension of the EnhancedDisassembly library, which provides tokenization and interpretation functions on top of the basic disassembler, to ARM. Please let me know what you think of this patch. Sean...
2012 May 23
0
[LLVMdev] Assembly macros instantiation problem
...39;_' || c == '$' || c == '.' || c == '@'; +} + bool AsmParser::expandMacro(SmallString<256> &Buf, StringRef Body, const std::vector<StringRef> &Parameters, const std::vector<std::vector<AsmToken> > &A, @@ -1501,7 +1506,7 @@ Pos += 2; } else { unsigned I = Pos + 1; - while (isalnum(Body[I]) && I + 1 != End) + while (IsIdentifierChar(Body[I]) && I + 1 != End) ++I; const char *Begin = Body.data() + Pos +1; ==============...
2013 Nov 01
8
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
In an earlier email[1] I proposed adding support for the ldr pseud-instruction to the ARM integrated assembler. After some discussion the overall consensus seemed to be that it was worth adding. One concern was that we needed to have adequate testing. I promised to provide more details on what the behavior should be and provide some tests before starting the implementation. The FileCheck-ified
2012 Oct 17
0
[LLVMdev] Hexagon Assembly parser question
On Oct 17, 2012, at 3:29 PM, David Young <davidy at codeaurora.org> wrote: > Hi, > I’m trying to enable the hexagon LLVM assembly parser. It seem like there is a lot of work that has been done to make this parsing straightforward. > > But…. > Hexagon assembly does not follow the “Mnemonic Rx Rx …” format that is expected by the assembly parsing infrastructure,
2012 Oct 17
3
[LLVMdev] Hexagon Assembly parser question
Hi, I'm trying to enable the hexagon LLVM assembly parser. It seem like there is a lot of work that has been done to make this parsing straightforward. But.. Hexagon assembly does not follow the "Mnemonic Rx Rx ." format that is expected by the assembly parsing infrastructure, represented by: StringRef Mnemonic = ((ARMOperand*)Operands[0])->getToken(); This