search for: aslvalue

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2017 Jul 31
1
[RFC PATCH] nv50/ir: allow spilling of def values for constrained MERGES/UNIONS
.../codegen/nv50_ir_ra.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp @@ -2344,8 +2344,6 @@ RegAlloc::InsertConstraintsPass::insertConstraintMoves() cst->setSrc(s, mov->getDef(0)); cst->bb->insertBefore(cst, mov); - cst->getDef(0)->asLValue()->noSpill = 1; // doesn't help - if (cst->op == OP_UNION) mov->setPredicate(defi->cc, defi->getPredicate()); } -- 2.13.3
2014 Jul 18
5
[PATCH 0/5] nvc0: fp64 preparation
Most of codegen is already FP64-ready. There are a few edge-cases that I ran into, many of which can apply even to non-fp64-enabled programs (although the double-wide registers are not very common without fp64). I've yet to give this a full piglit run, but wanted to send these out in case someone wanted to comment. They do not depend on the preliminary core fp64 work. Ilia Mirkin (5):
2014 Sep 25
0
[PATCH] nv50/ir: avoid deleting pseudo instructions too early
...um/drivers/nouveau/codegen/nv50_ir_ra.cpp @@ -25,6 +25,7 @@ #include <stack> #include <limits> +#include <tr1/unordered_set> namespace nv50_ir { @@ -1547,6 +1548,11 @@ SpillCodeInserter::run(const std::list<ValuePair>& lst) LValue *lval = it->first->asLValue(); Symbol *mem = it->second ? it->second->asSym() : NULL; + // Keep track of which instructions to delete later. Deleting them + // inside the loop is unsafe since a single instruction may have + // multiple destinations that all need to be spilled (like OP_SPLIT)....
2014 Sep 01
0
[PATCH] nv50/ir: use unordered_set instead of list to keep track of var defs
...efs.end(); ++d) - lval->join->defs.remove(*d); + lval->join->defs.erase(*d); lval->join = lval; } } @@ -1547,8 +1547,7 @@ SpillCodeInserter::run(const std::list<ValuePair>& lst) LValue *lval = it->first->asLValue(); Symbol *mem = it->second ? it->second->asSym() : NULL; - for (Value::DefIterator d = lval->defs.begin(); d != lval->defs.end(); - ++d) { + for (Value::DefIterator d = lval->defs.begin(); d != lval->defs.end();) { Value *slot = mem ?...
2014 May 18
1
[PATCH 1/2] nv50/ir: fix s32 x s32 -> high s32 multiply logic
Retrieving the high 32 bits of a signed multiply is rather annoying. It appears that the simplest way to do this is to compute the absolute value of the arguments, and perform a u32 x u32 -> u64 operation. If the arguments' signs differ, then negate the result. Since there is no u64 support in the cvt instruction, we have the perform the 2's complement negation "by hand".