search for: asip

> From: Mikael Lepist? <mikael.lepisto at tut.fi> > > Hi, Hi Mikael > I was talking with aKor in #llvm how we could implement custom operation > support for our ASIP architecture. We came into solution that the best > way would be to write new custom operation intrinsic and optimization > pass for raising certain type of function calls to those intrinsics > (similar to raising mallocs). I'm quite related to this field, both from the compiler (soft...

Hi, I was talking with aKor in #llvm how we could implement custom operation support for our ASIP architecture. We came into solution that the best way would be to write new custom operation intrinsic and optimization pass for raising certain type of function calls to those intrinsics (similar to raising mallocs). Basically our custom operation are like calls, with operand name and multipl...

On Tue, 31 Jul 2007, [ISO-8859-1] Mikael Lepist� wrote: > I was talking with aKor in #llvm how we could implement custom operation > support for our ASIP architecture. We came into solution that the best > way would be to write new custom operation intrinsic and optimization > pass for raising certain type of function calls to those intrinsics > (similar to raising mallocs). > > Basically our custom operation are like calls, with oper...

Chris Lattner wrote: > On Wed, 1 Aug 2007, [UTF-8] Mikael Lepist? wrote: > >>> def MOVNTPSmr : PSI<0x2B, MRMDestMem, (outs), (ins i128mem:$dst, >>> VR128:$src), >>> "movntps {$src, $dst|$dst, $src}", >>> [(int_x86_sse_movnt_ps addr:$dst, VR128:$src)]>; >>> >>> There is corresponding code in llvm-gcc to tell GCC how to

On Wed, 1 Aug 2007, [UTF-8] Mikael Lepist? wrote: >> def MOVNTPSmr : PSI<0x2B, MRMDestMem, (outs), (ins i128mem:$dst, >> VR128:$src), >> "movntps {$src, $dst|$dst, $src}", >> [(int_x86_sse_movnt_ps addr:$dst, VR128:$src)]>; >> >> There is corresponding code in llvm-gcc to tell GCC how to handle this >> builtin. Is this what you're

Chris Lattner wrote: > On Tue, 31 Jul 2007, [ISO-8859-1] Mikael Lepist� wrote: >> I was talking with aKor in #llvm how we could implement custom operation >> support for our ASIP architecture. We came into solution that the best >> way would be to write new custom operation intrinsic and optimization >> pass for raising certain type of function calls to those intrinsics >> (similar to raising mallocs). >> >> Basically our custom operation are l...

...a proposal for adding a project to the page http://llvm.org/ProjectsWithLLVM/. We successfully use LLVM as a base for a retargetable compiler and below is some information on the project. If you would have any comments, questions or if we should improve the text below, please let me know. --- Codasip Studio By Codasip Ltd. (link https://www.codasip.com/) Codasip Studio is a highly automated development environment that covers all aspects of Application Specific Instruction-set Processor (ASIP) design including LLVM-based C/C++ compiler generation. Starting with a high-level description of a...

...C++ anymore because so much code > assumes CHAR_BIT == 8, or at a minimum CHAR_BIT % 8 == 0, that we’re > supporting a different language. IMO they should use a different language, and > C / C++ should only allow CHAR_BIT % 8 == 0 (and only for small values of > CHAR_BIT). We (Synopsys ASIP Designer team) and our customers tend to disagree: our customers do create plenty of cpu architectures with non-8-bit characters (and non-8-bit addressable memories). We are able to provide them with a working c/c++ compiler solution. Maybe some support libraries are not supported out of the box, b...

...g on a backend for an ILP architecture, and at some point we would like to do some sort of region scheduling. To support region formation, we need to collect profiling information. I took a look at the bitcode interpreter, and it is fairly trivial to make it collect profiling data Our target is an ASIP for embedded applications, so it would typically be simulated during software development anyway. Would anyone else be interested in a profiling capability for lli? -- Pertti

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 [please cc to my address] Dear Samba and Netatalk experts, I've got a server running both samba 2.2.3a as PDC and netatalk (1.5pre7 as supplied by SuSE73). Samba machine accounts are added to /etc/passwd automatically by the command add user script = /usr/sbin/useradd -d /dev/null -g 90 -s /bin/false -M %u when a NT machine is added to the

Hello gyus, I am working on a project, where we are trying to create a development environment for new ASIP processor design. Part of this project is a compiler generator, where we would like to generate C compiler from some instruction description. To keep it short, let's say, that in each instruction's semantics is described by some C code. What I would like to do is to compile this code wit...

...that > > > we’re > > > supporting a different language. IMO they should use a different > > > language, and > > > C / C++ should only allow CHAR_BIT % 8 == 0 (and only for small > > > values of > > > CHAR_BIT). > > > > We (Synopsys ASIP Designer team) and our customers tend to > > disagree: our customers do create plenty of cpu architectures > > with non-8-bit characters (and non-8-bit addressable memories). We > > are able to provide them with a working c/c++ compiler solution. > > Maybe some support libra...

...---- From: asterisk-users-bounces@lists.digium.com [mailto:asterisk-users-bounces@lists.digium.com] On Behalf Of Wiley Siler Sent: Monday, June 06, 2005 12:44 PM To: Asterisk Users Mailing List - Non-Commercial Discussion Subject: RE: [Asterisk-Users] How to make Polycom phones work with Asterisk asaSIP Client? Seshu, I have Polycom IP500s and I have never had to set that parameter to make them work with Asterisk. I have used various versions of the BootROM and sip.ld without any issue. What problem are you specifically addressing? Thanks, Wiley -----Original Message----- From: asterisk-...

Hi :-) I am struggling through a RH 8.0 install on a machine we are looking to replace our Netware server. I got tapped to do this as I support the Graphics Deparment Mac OS ASIP server (running over 2 years now without a crash and no outage except for general maintenance). I am attempting to set up SAMBA to provide file sharing for our Windows clients (something not for the faint of heart, I understand). I was able to configure both Webmin and SWAT, and can access both...

Hi, I'm having trouble connecting to an Appleshare IP 6.2 Mac that is doing SMB file sharing from my RedHat Linux 7.2 box. I've looked and looked and looked at many things and many SMB clients. I've tried smbclient, smbmount, Sharity, and even just doing a mount -t smbfs. All of them come back with something of this form: Protocol Negotiation Failed SMB connection failed. I

...ed AdressSpace parameter or would we rely on the default value always? I could definitely include this, but if the parameter is never used, perhaps we can leave it out-of-tree for now? Best Regards, Jesper On Fri, 2019-05-03 at 10:33 +0000, Jeroen Dobbelaere wrote: > Hi Jesper, > > We (ASIP Designer team, Synopsys) are also interested in a cleaner > approach without those magic constants. > > Instead of 'n-bit bytes', we tend to talk about 'word addressing' and > 'addressable unit size'. > > We support C/C++ for various architectures that ou...

...the common denominator. It's probably ok to be less restrictive about a byte. -- Kind regards, Dmitry On Wed, Oct 30, 2019 at 5:19 PM David Chisnall via llvm-dev < llvm-dev at lists.llvm.org> wrote: > On 30/10/2019 10:07, Jeroen Dobbelaere via llvm-dev wrote: > > We (Synopsys ASIP Designer team) and our customers tend to disagree: our > customers do create plenty of cpu architectures > > with non-8-bit characters (and non-8-bit addressable memories). We are > able to provide them with a working c/c++ compiler solution. > > Maybe some support libraries are n...

On Tue, Oct 29, 2019 at 07:19:25PM +0000, Tim Northover via llvm-dev wrote: > On Tue, 29 Oct 2019 at 19:11, Dmitriy Borisenkov via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > 2. Test with a dummy target. It might work if we have a group of contributors who is willing to rewrite and upstream some of their downstream tests as well as to design and implement the target

On 08/23/2017 12:44 PM, David Chisnall wrote: > On 23 Aug 2017, at 18:21, Hal Finkel via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> On 08/23/2017 12:06 PM, Krzysztof Parzyszek via llvm-dev wrote: >>> On 8/23/2017 11:58 AM, Hal Finkel via llvm-dev wrote: >>>> If we want to go down that route, I can certainly imagine a feasible

A. This RFC outlines a proposal regarding non-8-bit-byte support that got positive reception at a Round Table at EuroLLVM19. The general topic has been brought up several times before and one good overview can be found in a FOSDEM 2017 presentation by Jones and Cook: https://archive.fosdem.org/2017/schedule/event/llvm_16_bit/ In a nutshell, the proposal is for the llvm community