Displaying 20 results from an estimated 29 matches for "arrayidx6".
Did you mean:
arrayidx
2014 Sep 24
2
[LLVMdev] noalias and alias.scope metadata producers
...plement the information that alias
analysis passes compute. However, it seems that the alias information of
the pointers used in memory instructions is assumed to be different form
the information of these instructions themselves. Let me give you an
example:
MayAlias: double* %arrayidx.i, double* %arrayidx6
MayAlias: %4 = load double* %arrayidx.i, align 8, !tbaa !1, !alias.scope
!7, !noalias !10 <-> store double %2, double* %arrayidx6, align 8, !tbaa
!1
becomes:
MayAlias: double* %arrayidx.i, double* %arrayidx6
NoAlias: %4 = load double* %arrayidx.i, align 8, !tbaa !1, !alias.scope
!8,...
2013 Nov 03
2
[LLVMdev] loop vectorizer issue
...ad' instruction prevented the Vectorizer to detect
dependency.
Is that a bug, or I'm missing something? Please advice
for.body4: ; preds = %for.body4,
%for.cond2.preheader
%k.030 = phi i32 [ 20, %for.cond2.preheader ], [ %inc8, %for.body4 ]
%arrayidx6 = getelementptr inbounds i32* %0, i32 %k.030
store i32 %.pre, i32* %arrayidx6, align 4, !tbaa !0
%inc8 = add nsw i32 %k.030, 1
%exitcond32 = icmp eq i32 %inc8, 50
br i1 %exitcond32, label %for.cond10.preheader, label %for.body4
Thanks in advance,
Sara Elshobaky
----------...
2013 Nov 03
0
[LLVMdev] loop vectorizer issue
...etect
> dependency.
>
> Is that a bug, or I’m missing something? Please advice
>
>
>
> for.body4: ; preds = %for.body4,
> %for.cond2.preheader
>
> %k.030 = phi i32 [ 20, %for.cond2.preheader ], [ %inc8, %for.body4 ]
>
> %arrayidx6 = getelementptr inbounds i32* %0, i32 %k.030
>
> store i32 %.pre, i32* %arrayidx6, align 4, !tbaa !0
>
> %inc8 = add nsw i32 %k.030, 1
>
> %exitcond32 = icmp eq i32 %inc8, 50
>
> br i1 %exitcond32, label %for.cond10.preheader, label %for.body4
>
>
>
>
>...
2013 Nov 03
3
[LLVMdev] loop vectorizer issue
...ad' instruction prevented the Vectorizer to detect
dependency.
Is that a bug, or I'm missing something? Please advice
for.body4: ; preds = %for.body4,
%for.cond2.preheader
%k.030 = phi i32 [ 20, %for.cond2.preheader ], [ %inc8, %for.body4 ]
%arrayidx6 = getelementptr inbounds i32* %0, i32 %k.030
store i32 %.pre, i32* %arrayidx6, align 4, !tbaa !0
%inc8 = add nsw i32 %k.030, 1
%exitcond32 = icmp eq i32 %inc8, 50
br i1 %exitcond32, label %for.cond10.preheader, label %for.body4
Thanks in advance,
Sara Elshobaky
_________...
2014 Sep 19
3
[LLVMdev] noalias and alias.scope metadata producers
Hi all,
In LLVM language reference I read that one can use noalias and alias.scope
metadata to provide more detailed information about pointer aliasing.
However, I was unable to obtain any LLVM IR annotations using this metadata
from any LLVM optimization pass or Clang frontend (am I missing
something?).
If I understand it correctly, this information would complement the
type-based alias
2013 Nov 03
0
[LLVMdev] loop vectorizer issue
...ion prevented the Vectorizer to detect dependency.
> Is that a bug, or I’m missing something? Please advice
>
> for.body4: ; preds = %for.body4, %for.cond2.preheader
> %k.030 = phi i32 [ 20, %for.cond2.preheader ], [ %inc8, %for.body4 ]
> %arrayidx6 = getelementptr inbounds i32* %0, i32 %k.030
> store i32 %.pre, i32* %arrayidx6, align 4, !tbaa !0
> %inc8 = add nsw i32 %k.030, 1
> %exitcond32 = icmp eq i32 %inc8, 50
> br i1 %exitcond32, label %for.cond10.preheader, label %for.body4
>
>
> Thanks in advance,
>...
2014 Sep 18
2
[LLVMdev] [Vectorization] Mis match in code generated
...= add nsw i32 %1, %0
> %arrayidx2 = getelementptr inbounds i32* %a, i32 2 %2 = load i32*
> %arrayidx2, align 4, !tbaa !1 %add3 = add nsw i32 %add, %2 %arrayidx4 =
> getelementptr inbounds i32* %a, i32 3 %3 = load i32* %arrayidx4, align 4,
> !tbaa !1 %add5 = add nsw i32 %add3, %3 %arrayidx6 = getelementptr
> inbounds i32* %a, i32 4 %4 = load i32* %arrayidx6, align 4, !tbaa !1
> %add7 = add nsw i32 %add5, %4 %arrayidx8 = getelementptr inbounds i32* %a,
> i32 5 %5 = load i32* %arrayidx8, align 4, !tbaa !1 %add9 = add nsw i32
> %add7, %5 %arrayidx10 = getelementptr inbou...
2014 Sep 19
3
[LLVMdev] [Vectorization] Mis match in code generated
...aa !1
%add = add nsw i32 %1, %0
%arrayidx2 = getelementptr inbounds i32* %a, i32 2
%2 = load i32* %arrayidx2, align 4, !tbaa !1
%add3 = add nsw i32 %add, %2
%arrayidx4 = getelementptr inbounds i32* %a, i32 3
%3 = load i32* %arrayidx4, align 4, !tbaa !1
%add5 = add nsw i32 %add3, %3
%arrayidx6 = getelementptr inbounds i32* %a, i32 4
%4 = load i32* %arrayidx6, align 4, !tbaa !1
%add7 = add nsw i32 %add5, %4
%arrayidx8 = getelementptr inbounds i32* %a, i32 5
%5 = load i32* %arrayidx8, align 4, !tbaa !1
%add9 = add nsw i32 %add7, %5
%arrayidx10 = getelementptr inbounds i32* %a,...
2018 Sep 19
2
Regarding Dependence distance dump
On Wed, Sep 19, 2018 at 4:58 AM Venkataramanan Kumar <
venkataramanan.kumar.llvm at gmail.com> wrote:
> Hi,
>
> I tired to see when this behavior changed in LLVM.
> It seems to start from.
> --snip--
> commit 95e5d37d5868ebde2302bc302c1e0af407c5646d
> Author: Sebastian Pop <sebpop at gmail.com>
> Date: Tue Mar 6 21:55:59 2018 +0000
>
> DA: remove
2014 Sep 18
2
[LLVMdev] [Vectorization] Mis match in code generated
...gn 4, !tbaa !1 %add = add nsw i32 %1, %0
%arrayidx2 = getelementptr inbounds i32* %a, i32 2 %2 = load i32*
%arrayidx2, align 4, !tbaa !1 %add3 = add nsw i32 %add, %2 %arrayidx4 =
getelementptr inbounds i32* %a, i32 3 %3 = load i32* %arrayidx4, align 4,
!tbaa !1 %add5 = add nsw i32 %add3, %3 %arrayidx6 = getelementptr
inbounds i32* %a, i32 4 %4 = load i32* %arrayidx6, align 4, !tbaa !1
%add7 = add nsw i32 %add5, %4 %arrayidx8 = getelementptr inbounds i32* %a,
i32 5 %5 = load i32* %arrayidx8, align 4, !tbaa !1 %add9 = add nsw i32
%add7, %5 %arrayidx10 = getelementptr inbounds i32* %a, i32 6...
2015 Jul 16
4
[LLVMdev] Improving loop vectorizer support for loops with a volatile iteration variable
----- Original Message -----
> From: "Hal Finkel" <hfinkel at anl.gov>
> To: "Chandler Carruth" <chandlerc at google.com>
> Cc: llvmdev at cs.uiuc.edu
> Sent: Thursday, July 16, 2015 1:58:02 AM
> Subject: Re: [LLVMdev] Improving loop vectorizer support for loops
> with a volatile iteration variable
> ----- Original Message -----
> >
2014 Nov 10
2
[LLVMdev] [Vectorization] Mis match in code generated
...; > > %2 = load i32* %arrayidx2, align 4, !tbaa !1
> > > %add3 = add nsw i32 %add, %2
> > > %arrayidx4 = getelementptr inbounds i32* %a, i32 3
> > > %3 = load i32* %arrayidx4, align 4, !tbaa !1
> > > %add5 = add nsw i32 %add3, %3
> > > %arrayidx6 = getelementptr inbounds i32* %a, i32 4
> > > %4 = load i32* %arrayidx6, align 4, !tbaa !1
> > > %add7 = add nsw i32 %add5, %4
> > > %arrayidx8 = getelementptr inbounds i32* %a, i32 5
> > > %5 = load i32* %arrayidx8, align 4, !tbaa !1
> > > %ad...
2020 Jul 09
2
Understand alias-analysis results
Hello,
I am performing alias analysis toward the following simple code:
struct MyStruct {
int * f1;
int * f2;
};
void NOALIAS(void* p, void* q){
}
int main() {
struct MyStruct s[2];
int a,b;
s[0].f1 = &a;
s[1].f1 = &b;
NOALIAS(s[a].f1, s[b].f2);
return 0;
}
When I use the following command to generate .bc code and conduct alias
analysis:
clang -c -emit-llvm t.c -O2
opt -basicaa
2015 Aug 13
2
[LLVMdev] Improving loop vectorizer support for loops with a volatile iteration variable
...,
> i32* %i, align 4, !dbg !40 br label %for.cond, !dbg !41 for.body.4:
> ; preds = %for.cond.1 %idxprom = sext i32 %j.0 to i64, !dbg !42
> %arrayidx = getelementptr inbounds float, float* %y, i64 %idxprom,
> !dbg !42 %0 = load float, float* %arrayidx, align 4, !dbg !42, !tbaa
> !44 %arrayidx6 = getelementptr inbounds float, float* %z, i64
> %idxprom, !dbg !48 %1 = load float, float* %arrayidx6, align 4, !dbg
> !48, !tbaa !44 %add = fadd float %0, %1, !dbg !49 %arrayidx8 =
> getelementptr inbounds float, float* %x, i64 %idxprom, !dbg !50
> store float %add, float* %arrayidx8,...
2015 Jun 12
4
[LLVMdev] Loop Vectorization and Store-Load Forwarding issue
...5] ;
}
}
}
Part C:
<snip> from the debug dump during the LoopAccessAnalysis phase:
LAA: Checking memory dependencies
LAA: Src Scev: {(8 + %y),+,8}<%for.body3>Sink Scev: {(128 + %y),+,8}<nsw><%for.body3>(Induction step: 1)
LAA: Distance for %3 = load i64, i64* %arrayidx6, align 8 to store i64 %add, i64* %arrayidx8, align 8: 120
LAA: Distance 120 that could cause a store-load forwarding conflict
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150612/490fd9fb/attachment.h...
2020 Jul 09
2
Understand alias-analysis results
...%struct.MyStruct, %struct.MyStruct*
> %arrayidx3, i32 0, i32 0
> %4 = load i32*, i32** %f14, align 16, !tbaa !2
> %5 = bitcast i32* %4 to i8*
>
> ; the following corresponds to loading `s[b].f2`
> %6 = load i32, i32* %b, align 4, !tbaa !7
> %idxprom5 = sext i32 %6 to i64
> %arrayidx6 = getelementptr inbounds [2 x %struct.MyStruct], [2 x
> %struct.MyStruct]* %s, i64 0, i64 %idxprom5
> %f2 = getelementptr inbounds %struct.MyStruct, %struct.MyStruct*
> %arrayidx6, i32 0, i32 1
> %7 = load i32*, i32** %f2, align 8, !tbaa !9
> %8 = bitcast i32* %7 to i8*
> call voi...
2015 May 21
2
[LLVMdev] How can I remove these redundant copy between registers?
Hi,
I've been working on a Blackfin backend (llvm-3.6.0) based on the previous
one that was removed in llvm-3.1.
llc generates codes like this:
29 p1 = r2;
30 r5 = [p1];
31 p1 = r2;
32 r6 = [p1 + 4];
33 r5 = r6 + r5;
34 r6 = [p0 + -4];
35 r5 *= r6;
36 p1 = r2;
37 r6 = [p1 + 8];
38 p1 = r2;
p1 and r2 are in different register classes.
A p*
2013 Oct 30
0
[LLVMdev] loop vectorizer
...orizing a list of length = 2.
SLP: Vectorizing a list of length = 2.
LV: Checking a loop in "_Z3barmmPfS_S_"
LV: Found a loop: for.body
LV: Found an induction variable.
LV: We need to do 0 pointer comparisons.
LV: Checking memory dependencies
LV: Bad stride - Not an AddRecExpr pointer %arrayidx6 = getelementptr
inbounds float* %c, i64 %add2 SCEV: ((4 * %add2)<nsw> + %c)<nsw>
LV: Bad stride - Not an AddRecExpr pointer %arrayidx10 = getelementptr
inbounds float* %c, i64 %add312 SCEV: ((4 * %add312)<nsw> + %c)<nsw>
LV: Src Scev: ((4 * %add2)<nsw> + %c)<nsw...
2008 Jul 21
6
[LLVMdev] LICM/store-aliasing of global loads
...l %afterfor
forbody: ; preds = %forcond
%tmp3 = load float** @b ; <float*> [#uses=1]
%arrayidx = getelementptr float* %tmp3, i32 %i.
0 ; <float*> [#uses=1]
%tmp5 = load float** @a ; <float*> [#uses=1]
%arrayidx6 = getelementptr float* %tmp5, i32 %i.
0 ; <float*> [#uses=1]
%tmp7 = load float* %arrayidx6 ; <float> [#uses=1]
store float %tmp7, float* %arrayidx
br label %forinc
forinc: ; preds = %forbody
%inc = add i32 %i.0, 1...
2013 Oct 30
2
[LLVMdev] loop vectorizer
The debug messages are misleading. They should read “trying to vectorize a list of …”; The problem is that the SCEV analysis is unable to detect that C[ir0] and C[ir1] are consecutive. Is this loop from an important benchmark ?
Thanks,
Nadav
On Oct 30, 2013, at 11:13 AM, Frank Winter <fwinter at jlab.org> wrote:
> The SLP vectorizer apparently did something in the prologue of the