search for: armv7m

Displaying 20 results from an estimated 44 matches for "armv7m".

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2013 Oct 15
2
[LLVMdev] Unwanted push/pop on Cortex-M.
...t; > I have this code: > > void platform_putchar(int, char); > void out_char( char ch ); > > void out_char( char ch ) > { > platform_putchar (0, ch); > } > > I'm compiling with the following clang invocation: > > $ /usr/local/vendor/toolchains/llvm/3.3/armv7m/bin/armv7m-none-eabi-clang > -mcpu=cortex-m4 -mfloat-abi=soft -mthumb -nostdinc -ffreestanding > -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti > -fomit-frame-pointer -momit-leaf-frame-pointer -nostdinc -v -Os -S -o > a.s a.c > vendor-clang version 3.3 (tags/RELEASE_33...
2013 Oct 15
1
[LLVMdev] Unwanted push/pop on Cortex-M.
...platform_putchar(int, char); >> void out_char( char ch ); >> >> void out_char( char ch ) >> { >> platform_putchar (0, ch); >> } >> >> I'm compiling with the following clang invocation: >> >> $ /usr/local/vendor/toolchains/llvm/3.3/armv7m/bin/armv7m-none-eabi-clang >> -mcpu=cortex-m4 -mfloat-abi=soft -mthumb -nostdinc -ffreestanding >> -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti >> -fomit-frame-pointer -momit-leaf-frame-pointer -nostdinc -v -Os -S -o >> a.s a.c >> vendor-clang version...
2013 Oct 15
0
[LLVMdev] Unwanted push/pop on Cortex-M.
...putchar(int, char); > > void out_char( char ch ); > > > > void out_char( char ch ) > > { > > platform_putchar (0, ch); > > } > > > > I'm compiling with the following clang invocation: > > > > $ /usr/local/vendor/toolchains/llvm/3.3/armv7m/bin/armv7m-none-eabi-clang > > -mcpu=cortex-m4 -mfloat-abi=soft -mthumb -nostdinc -ffreestanding > > -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti > > -fomit-frame-pointer -momit-leaf-frame-pointer -nostdinc -v -Os -S -o > > a.s a.c > > vendor-clang ver...
2015 Nov 19
2
Recent -Os code size regressions
Hello LLVM, Does the community have bots or humans tracking code size for -Os builds? I've noticed troubling regressions lately. Sometime near Nov 5, the EEMBC bitmnp01 benchmark grew by 25% for ARMv7m and 35% for i586. That's ghastly. This week, the EEMBC matrix01 workload grew by 5% for ARMv7m and 3% for i586. Regards, -steve
2013 Jul 17
2
[LLVMdev] Help with subtarget features and context-dependent asm parsers
...show-encoding < /home/richards/llvm/src/test/MC/ARM/basic -thumb2-instructions.s | /home/richards/llvm/build/Debug+Asserts/bin/FileCheck /home/richards/llvm/src/test/MC/ARM/basic-thumb2-instructions.s -- Exit Code: 1 Command Output (stderr): -- <stdin>:1356:9: error: instruction requires: armv7m mrs r8, apsr ^ <stdin>:1357:9: error: instruction requires: armv7m mrs r8, cpsr ^ <stdin>:1358:9: error: instruction requires: armv7m mrs r8, spsr ^ and the second was the same for basic-arm-instructions.s. The problem seems to be tha...
2013 Oct 15
0
[LLVMdev] Unwanted push/pop on Cortex-M.
Hi, I have this code: void platform_putchar(int, char); void out_char( char ch ); void out_char( char ch ) { platform_putchar (0, ch); } I'm compiling with the following clang invocation: $ /usr/local/vendor/toolchains/llvm/3.3/armv7m/bin/armv7m-none-eabi-clang -mcpu=cortex-m4 -mfloat-abi=soft -mthumb -nostdinc -ffreestanding -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fomit-frame-pointer -momit-leaf-frame-pointer -nostdinc -v -Os -S -o a.s a.c vendor-clang version 3.3 (tags/RELEASE_33/final) (based on LLVM 3....
2015 Nov 21
2
Recent -Os code size regressions
...> Hi Steve, > > I still haven't got around doing a CI for EEMBC or SPEC on ARM. I do > track performance every release, but not code size at -Os. > >> I've noticed troubling regressions lately. Sometime near Nov >> 5, the EEMBC bitmnp01 benchmark grew by 25% for ARMv7m and 35% for >> i586. That's ghastly. This week, the EEMBC matrix01 workload grew by >> 5% for ARMv7m and 3% for i586. > > Hum, v7M is even lower priority for me at the moment. :) > > Though, I have to say, 25% is really bad. Can you bisect to see which > commit was...
2013 Oct 21
1
[LLVMdev] [PATCH] Unwanted r11 in push/pop on Cortex-M.
...; >> void out_char( char ch ) >> >> { >> >> platform_putchar (0, ch); >> >> } >> >> >> >> I'm compiling with the following clang invocation: >> >> >> >> $ >> /usr/local/vendor/toolchains/llvm/3.3/armv7m/bin/armv7m-none-eabi-clang >> >> -mcpu=cortex-m4 -mfloat-abi=soft -mthumb -nostdinc -ffreestanding >> >> -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti >> >> -fomit-frame-pointer -momit-leaf-frame-pointer -nostdinc -v -Os -S -o >> >> a....
2012 Jul 18
2
[LLVMdev] Setting up a cross-compiler for cortex-m3
...vatore.benedetto at gmail.com> wrote: > but I still haven't figure out how to build for cortex-m3 > > clang -march=armv7-m -mfloat-abi=soft <something missing?> testReference.cpp -c -march should have done the trick. You can also try -mcpu=cortex-m3, or try -ccc-host-triple armv7m-none-gnueabi (or -eabi), and possibly -ccc-gcc-name code sourcery's gcc, or possibly --sysroot=code sourcery/libc -- cheers, --renato http://systemcall.org/
2012 Jul 18
0
[LLVMdev] Setting up a cross-compiler for cortex-m3
...: >> but I still haven't figure out how to build for cortex-m3 >> >> clang -march=armv7-m -mfloat-abi=soft <something missing?> testReference.cpp -c > > -march should have done the trick. > > You can also try -mcpu=cortex-m3, > > or try -ccc-host-triple armv7m-none-gnueabi (or -eabi), I've tried with all of the following $ clang -march=armv7-m -mfloat-abi=soft -triple thumb2-unknown-unknown -integrated-as testReference.cpp -c clang: warning: argument unused during compilation: '-mfloat-abi=soft' clang: warning: argument unused during compil...
2013 Jul 17
0
[LLVMdev] Help with subtarget features and context-dependent asm parsers
> /tmp/foo.s:1:2: error: instruction requires: distinct-ops > sllk %r2,%r3,1 > ^ That seems like it would be a good improvement for all targets. > ARM seems to rely on the current MatchOperandParserImpl() behaviour, > so I'm not going to suggest changing it unconditionally. Presumably you switched it and looked at what fell over; do you remember what kind
2013 Jul 17
0
[LLVMdev] Help with subtarget features and context-dependent asm parsers
...rds/llvm/src/test/MC/ARM/basic > -thumb2-instructions.s | /home/richards/llvm/build/Debug+Asserts/bin/FileCheck /home/richards/llvm/src/test/MC/ARM/basic-thumb2-instructions.s > -- > Exit Code: 1 > Command Output (stderr): > -- > <stdin>:1356:9: error: instruction requires: armv7m > mrs r8, apsr > ^ > <stdin>:1357:9: error: instruction requires: armv7m > mrs r8, cpsr > ^ > <stdin>:1358:9: error: instruction requires: armv7m > mrs r8, spsr > ^ > > and the second was the same for basic-arm-...
2015 Jan 10
2
[LLVMdev] LTO support on Mac
Hi, I'm building LLVM on Mac OS 10.10 and I'm having trouble making LTO work. The system linker dumps the following information when I executed "ld -v" @(#)PROGRAM:ld PROJECT:ld64-241.9 configured to support archs: armv6 armv7 armv7s arm64 i386 x86_64 x86_64h armv6m armv7m armv7em LTO support using: LLVM version 3.4.2 which tells me that it is correctly pointing to the LLVM that I have built. However, when I pass any LTO command line arguments like "disable-inling" it complains. I was previously working on Linux and the gold plugin makes it very convenien...
2013 Oct 11
3
[LLVMdev] Generate code for ARM Cortex m0, m3, and m4.
Hi, I am trying to cross compile code for ARM Cortex m0, m3, and m4. For m0, I use: -target armv6--eabi -mcpu=cortex-m0 That seems to work. For m3 and m4, I use the following which does not work (fatal error: error in backend: CPU: 'cortex-m3' does not support ARM mode): -target armv7m--eabi -mcpu=cortex-m3 and -target armv7em--eabi -mcpu=cortex-m4 Who can help me with the right command line arguments for m3 and m4? Thanks, Jan
2013 Jul 17
2
[LLVMdev] Help with subtarget features and context-dependent asm parsers
I'm trying to add some instructions that are only available on certain processors. These instructions use context-dependent parsers. Everything works fine for the valid cases, but if you try to use an instruction on processors that don't support it, the asm parser says: /tmp/foo.s:1:2: error: invalid operands for instruction sllk %r2,%r3,1 ^ rather than:
2017 Nov 10
5
[RFC] Enable Partial Inliner by default
...<junbuml at codeaurora.org>, "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org>, nd <nd at arm.com>, Tobias Grosser <tobias.grosser at inf.ethz.ch> Subject: Re: [llvm-dev] [RFC] Enable Partial Inliner by default Hi Evgeny, When you think the experiments on armv7m and armv6m targets will be complete? We're looking to turn this on sooner rather than later, if there aren't objections from folks running on other platforms. Cheers, Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca...
2017 Nov 10
0
[RFC] Enable Partial Inliner by default
...t;junbuml at codeaurora.org>, "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org>, nd <nd at arm.com>, Tobias Grosser <tobias.grosser at inf.ethz.ch> Subject: Re: [llvm-dev] [RFC] Enable Partial Inliner by default Hi Evgeny, When you think the experiments on armv7m and armv6m targets will be complete? We're looking to turn this on sooner rather than later, if there aren't objections from folks running on other platforms. Cheers, Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca...
2015 Nov 21
3
Recent -Os code size regressions
...> Hi Steve, > > I still haven't got around doing a CI for EEMBC or SPEC on ARM. I do > track performance every release, but not code size at -Os. > >> I've noticed troubling regressions lately. Sometime near Nov >> 5, the EEMBC bitmnp01 benchmark grew by 25% for ARMv7m and 35% for >> i586. That's ghastly. This week, the EEMBC matrix01 workload grew by >> 5% for ARMv7m and 3% for i586. > > Hum, v7M is even lower priority for me at the moment. :) > > Though, I have to say, 25% is really bad. Can you bisect to see which > commit was...
2011 Oct 13
2
[LLVMdev] LLC ARM Backend maintainer
...to add my resources for ARM target qualification. - Cortex-A9MP (Tegra2) ARMv7 architecture on Ubuntu/Linux, this is quite useable dual-core system for host testing. I have 2 systems that I can volunteer. - Cortex-A8 I have bunch of devices but they are only good for target testing. - Cortex-Mx ARMv7M I have myriad of boards that I use for target testing, the problem is that they can only run very small testcases. - Assorted ARMv4, ARMv5 and ARMv6 architecture or ARM11, ARM9 and ARM7 processors. Usable for host testing are the Marvell Armada/Kirkwood based Plug Computers, easy to get and I can...
2015 Jan 12
2
[LLVMdev] LTO support on Mac
...OS 10.10 and I'm having trouble making LTO work. >> The system linker dumps the following information when I executed "ld -v" >> >> @(#)PROGRAM:ld PROJECT:ld64-241.9 >> configured to support archs: armv6 armv7 armv7s arm64 i386 x86_64 x86_64h >> armv6m armv7m armv7em >> LTO support using: LLVM version 3.4.2 >> >> which tells me that it is correctly pointing to the LLVM that I have built. >> However, when I pass any LTO command line arguments like "disable-inling" it >> complains. >> >> I was previous...