search for: armv6zk

...cat /tmp/test.s .fpu neon-fp16 $ ./clang --target=arm-arm-none-eabi -march=armv7-m -c /tmp/test.s -o /tmp/test.o GCC .fpu ======== .fpu is provided for ARM only and the FPU names are not checked against the base arch or CPU. This is correctly rejected from a command line: $ ./arm-eabi-gcc -march=armv6zk+neon -c /tmp/test.s -o /tmp/test.o arm-eabi-gcc: error: 'armv6zk' does not support feature 'neon' arm-eabi-gcc: note: valid feature names are: fp nofp vfpv2 Whereas the directive is accepted: $ cat /tmp/test.s .fpu neon nop $ ./arm-eabi-gcc -march=armv6zk -c /tmp/test.s -o /tmp/tes...

...ell how about as a strawman... taking some options from http://en.wikipedia.org/wiki/List_of_ARM_microprocessor_cores and http://en.wikipedia.org/wiki/List_of_applications_of_ARM_cores LLVM Supports: ARMv4T -> ARM7TDMI ARMv5TE -> ARM926EJ-S -> XScale ARMv6 -> ARM1136J(F)-S ARMv6ZK -> ARM1176JZ(F)-S ARMv7A -> Cortex-A8 Cortex-A9 ARMv7M -> Cortex-M3 Granted there are many many more listed within in ARM.td, but I think we should start with a small subset and build on it as we begin guaranteeing maintenance. Once we compile a set of ISAs and implementatio...

...cat /tmp/test.s .fpu neon-fp16 $ ./clang --target=arm-arm-none-eabi -march=armv7-m -c /tmp/test.s -o /tmp/test.o GCC .fpu ======== .fpu is provided for ARM only and the FPU names are not checked against the base arch or CPU. This is correctly rejected from a command line: $ ./arm-eabi-gcc -march=armv6zk+neon -c /tmp/test.s -o /tmp/test.o arm-eabi-gcc: error: 'armv6zk' does not support feature 'neon' arm-eabi-gcc: note: valid feature names are: fp nofp vfpv2 Whereas the directive is accepted: $ cat /tmp/test.s .fpu neon nop $ ./arm-eabi-gcc -march=armv6zk -c /tmp/test.s -o /tmp/tes...

On Thu, Oct 13, 2011 at 11:25 AM, Joe Abbey <jabbey at arxan.com> wrote: > LLVM Supports: > ARMv4T  -> ARM7TDMI > ARMv5TE -> ARM926EJ-S >         -> XScale > ARMv6   -> ARM1136J(F)-S > ARMv6ZK -> ARM1176JZ(F)-S > ARMv7A  -> Cortex-A8 >            Cortex-A9 > ARMv7M  -> Cortex-M3 Does the LLVM code generator generate Thumb code in addition to ARM code? For those who don't know ARM, Thumb is a subset of ARM in which each instruction is 16-bits in size. ARM instruc...

...cat /tmp/test.s .fpu neon-fp16 $ ./clang --target=arm-arm-none-eabi -march=armv7-m -c /tmp/test.s -o /tmp/test.o GCC .fpu ======== .fpu is provided for ARM only and the FPU names are not checked against the base arch or CPU. This is correctly rejected from a command line: $ ./arm-eabi-gcc -march=armv6zk+neon -c /tmp/test.s -o /tmp/test.o arm-eabi-gcc: error: 'armv6zk' does not support feature 'neon' arm-eabi-gcc: note: valid feature names are: fp nofp vfpv2 Whereas the directive is accepted: $ cat /tmp/test.s .fpu neon nop $ ./arm-eabi-gcc -march=armv6zk -c /tmp/test.s -o /tmp/tes...

> The ARM Holdings emulator does this; I used it with great success to > profile an Advanced Encryption Standard encryptor a while back. It is indeed a useful piece of kit. We do a lot of our internal regression tests on it, and also run LLVM's regression tests every night on it (as well as PlumHall, EEMBC and SpecInt). Unfortunately it's not exactly software we can give away or