search for: armv6m

...cpu_model.c.o ../projects/compiler-rt/lib/builtins/cpu_model.c:596:7: warning: ISO C requires a translation unit to contain at least one declaration [-Wempty-translation-unit] #endif ^ 1 warning generated. [1786/5024] Building C object projects/compiler-rt/lib/builtins/CMakeFiles/clang_rt.builtins-armv6m.dir/cpu_model.c.o ../projects/compiler-rt/lib/builtins/cpu_model.c:596:7: warning: ISO C requires a translation unit to contain at least one declaration [-Wempty-translation-unit] #endif ^ 1 warning generated. [1915/5024] Building ASM object projects/compiler-rt/lib/built...s/CMakeFiles/clang_rt.b...

...4/bin"/clang -static --target=arm-none-eabi -mcpu=cortex-m0 -c -o a.o a.c "clang+llvm-5.0.0-linux-x86_64-ubuntu16.04/bin"/clang -static --target=arm-none-eabi -mcpu=cortex-m0 -c -o reset.o reset.c "clang+llvm-5.0.0-linux-x86_64-ubuntu16.04/bin"/clang -v -static --target=armv6m-none-eabi -o main main.o a.o reset.o clang version 5.0.0 (tags/RELEASE_500/final) Target: armv6m-none--eabi Thread model: single InstalledDir: clang+llvm-5.0.0-linux-x86_64-ubuntu16.04/bin "clang+llvm-5.0.0-linux-x86_64-ubuntu16.04/bin/ld.lld" main.o a.o reset.o -Bstatic -Lclang+llvm-5.0....

Hi, all I want to use LLVM to compile an ARM Cortex-M0 project on windows. Who can send me a sample, including command arguments and introdution about debug process. Thanks a lot. -Steven ***************************** Legal Disclaimer ***************************** "This email may contain confidential and privileged material for the sole use of the intended recipient. Any unauthorized

...in additional instructions to modify the base address. https://godbolt.org/z/T1xhae void* memcpy_alt1(void* dst, const void* src, size_t len) { char* save = (char*)dst; for (size_t i = 0; i < len; ++i) *((char*)(dst + i)) = *((char*)(src + i)); return save; } clang --target=armv6m-none-eabi -Os -fomit-frame-pointer memcpy_alt1: push {r4, lr} cmp r2, #0 beq .LBB0_3 mov r3, r0 .LBB0_2: ldrb r4, [r1] strb r4, [r3] adds r1, r1, #1 adds r3, r3, #1 subs r2, r2, #1 bne...

On 12 October 2013 23:00, Amara Emerson <amara.emerson at gmail.com> wrote: > Hi Jan, > > For Cortex-M0, you should probably use the armv6m string in the target > triple. For M3 and M4 you need to use the thumbv7m arch string, -mthumb > won't be necessary. > Yes, but I agree with Jim that a bug must be filled. Jan, would you mind filling a bug? http://llvm.org/bugs/enter_bug.cgi?product=clang cheers, --renato ---------...

Hi, I'm building LLVM on Mac OS 10.10 and I'm having trouble making LTO work. The system linker dumps the following information when I executed "ld -v" @(#)PROGRAM:ld PROJECT:ld64-241.9 configured to support archs: armv6 armv7 armv7s arm64 i386 x86_64 x86_64h armv6m armv7m armv7em LTO support using: LLVM version 3.4.2 which tells me that it is correctly pointing to the LLVM that I have built. However, when I pass any LTO command line arguments like "disable-inling" it complains. I was previously working on Linux and the gold plugin makes it very co...

...at codeaurora.org>, "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org>, nd <nd at arm.com>, Tobias Grosser <tobias.grosser at inf.ethz.ch> Subject: Re: [llvm-dev] [RFC] Enable Partial Inliner by default Hi Evgeny, When you think the experiments on armv7m and armv6m targets will be complete? We're looking to turn this on sooner rather than later, if there aren't objections from folks running on other platforms. Cheers, Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca.ibm.com [...

...t codeaurora.org>, "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org>, nd <nd at arm.com>, Tobias Grosser <tobias.grosser at inf.ethz.ch> Subject: Re: [llvm-dev] [RFC] Enable Partial Inliner by default Hi Evgeny, When you think the experiments on armv7m and armv6m targets will be complete? We're looking to turn this on sooner rather than later, if there aren't objections from folks running on other platforms. Cheers, Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca.ibm.com I...

Hello Sjoerd, Thank you for your response! I was not aware that -Oz is a closer equivalent to GCC's -Os. I tried -Oz when compiling with clang and confirmed that the Clang's generated assembly is equivalent to GCC for the code snippet I posted above. clang --target=armv6m-none-eabi -Oz -fomit-frame-pointer memcpy_alt1: push {r4, lr} movs r3, #0 .LBB0_1: cmp r2, r3 beq .LBB0_3 ldrb r4, [r1, r3] strb r4, [r0, r3] adds r3, r3, #1 b .LBB0_1 .LBB0_3: pop {r4, pc} On...

...on Mac OS 10.10 and I'm having trouble making LTO work. >> The system linker dumps the following information when I executed "ld -v" >> >> @(#)PROGRAM:ld PROJECT:ld64-241.9 >> configured to support archs: armv6 armv7 armv7s arm64 i386 x86_64 x86_64h >> armv6m armv7m armv7em >> LTO support using: LLVM version 3.4.2 >> >> which tells me that it is correctly pointing to the LLVM that I have built. >> However, when I pass any LTO command line arguments like "disable-inling" it >> complains. >> >> I was p...

Forgot to add that all experiments were done with '-O3 -m64 -fexperimental-new-pass-manager'. Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca.ibm.com From: Graham Yiu/Toronto/IBM To: llvm-dev at lists.llvm.org Cc: junbuml at codeaurora.org, xinliangli at gmail.com Date: 11/02/2017 05:26 PM Subject: [RFC]

Hi Jan, For Cortex-M0, you should probably use the armv6m string in the target triple. For M3 and M4 you need to use the thumbv7m arch string, -mthumb won't be necessary. Amara On 11 October 2013 19:23, Jan Hoogerbrugge < jan.hoogerbrugge at biface-tools.com> wrote: > Hi, > > I am trying to cross compile code for ARM Cortex m0, m3,...

...rday, 12 October 2013, Renato Golin wrote: > On 12 October 2013 23:00, Amara Emerson <amara.emerson at gmail.com<javascript:_e({}, 'cvml', 'amara.emerson at gmail.com');> > > wrote: > >> Hi Jan, >> >> For Cortex-M0, you should probably use the armv6m string in the target >> triple. For M3 and M4 you need to use the thumbv7m arch string, -mthumb >> won't be necessary. >> > > Yes, but I agree with Jim that a bug must be filled. > > Jan, would you mind filling a bug? > > http://llvm.org/bugs/enter_bug.cgi?pr...

...t through > our submissions process. > > > On Saturday, 12 October 2013, Renato Golin wrote: > >> On 12 October 2013 23:00, Amara Emerson <amara.emerson at gmail.com> wrote: >> >>> Hi Jan, >>> >>> For Cortex-M0, you should probably use the armv6m string in the target >>> triple. For M3 and M4 you need to use the thumbv7m arch string, -mthumb >>> won't be necessary. >>> >> >> Yes, but I agree with Jim that a bug must be filled. >> >> Jan, would you mind filling a bug? >> >> h...

...at codeaurora.org>, "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org>, Tobias Grosser <tobias.grosser at inf.ethz.ch>, nd <nd at arm.com> Subject: Re: [llvm-dev] [RFC] Enable Partial Inliner by default Hi Graham, I’ve got results of benchmarking. Armv7m and armv6m are not affected. No changes in scores nor code sizes. I did some additional benchmarks runs for AArch64 and AArch32. LNT test suite, AArch32, Cortex-A57, -O3 -mcpu=cortex-a57 -mthumb -fomit-frame-pointer ---------------------------------------------------------------------------------------------...

Hello Christian, I reran my script with a similar cmake command to yours. After the build finished the following command from the build directory gave me: find . -name \*builtins.a ./lib/clang/9.0.0/armv6m-none-eabi/lib/libclang_rt.builtins.a ./lib/clang/9.0.0/armv7m-none-eabi/lib/libclang_rt.builtins.a ./lib/clang/9.0.0/armv7em-none-eabi/lib/libclang_rt.builtins.a I hope you see something like this with your build. You can check that they are correct by disassembling them to see if they contain the...

Hi, I am trying to cross compile code for ARM Cortex m0, m3, and m4. For m0, I use: -target armv6--eabi -mcpu=cortex-m0 That seems to work. For m3 and m4, I use the following which does not work (fatal error: error in backend: CPU: 'cortex-m3' does not support ARM mode): -target armv7m--eabi -mcpu=cortex-m3 and -target armv7em--eabi -mcpu=cortex-m4 Who can help me with the

Hi LLVM devs,  I came across an LLD bug in v 10.x where ELF parser / processor is setting .PROGBITS attribute for .heap and .stack sections, which leads to large binaries when we do `llvm-objcopy -o binary` to generate the binary output for armv6m. (e.g. for a 57Kb elf would yield a ~400Mb binary). This in comparison with LLVM 7.x , would produce the correct binary size of 35Kb and the elf sections have NOBITS for .heap and .stack sections. I narrowed down the problem to the following commit and the commits around this....Please see be...

Hello Christian, I'd expect that adding the library paths (-L) from gcc -v should fix the unable to find -lc, -lm but it won't fix the -lclang_rt.builtins-armv6m.a . To get clang_rt.builtins-armv6m.a you will need to cross compile compiler-rt for v6m and copy it to /usr/local/myclang/lib/clang/8.0.0/lib/baremetal . Beware that building compiler-rt for v6m does need quite a bit of fighting cmake (https://llvm.org/docs/HowToCrossCompileBuiltinsOnArm.html). Yo...

...s led me to this thread. http://llvm.1065342.n5.nabble.com/llvm-dev-Compiling-for-baremetal-ARMv4-on-Ubuntu-Linux-td124226.html After going through this I figured my best bet would be using GCC sysroot. After which my cmake command looks like this. cmake -G "Unix Makefiles" -DBAREMETAL_ARMV6M_SYSROOT=../../gcc-arm-none-eabi-9-2019-q4-major/arm-none-eabi/ -DBAREMETAL_ARMV7M_SYSROOT=../../gcc-arm-none-eabi-9-2019-q4-major/arm-none-eabi/ -DBAREMETAL_ARMV7EM_SYSROOT=../../gcc-arm-none-eabi-9-2019-q4-major/arm-none-eabi/ -DCMAKE_BUILD_TYPE=Release -C ../clang/cmake/caches/BaremetalARM.cmake...