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armschedulea9
2016 Jun 06
2
Instruction Itineraries: question about operand latencies
...low or fast
memory, I've gone ahead and made all of the load numbers high, such as:
InstrItinData< II_LOAD1, [InstrStage<150, [AGU]>]>,
However, I see that there is another field which I haven't specified where
operand latencies are specified. Here's an example from
ARMScheduleA8.td:
InstrItinData<IIC_iALUi ,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2]>,
Now I'm wondering if Instead of what I had above, I should instead have
specified:
InstrItinData< II_LOAD1, [InstrStage<150, [AGU]>],[150,1,1]>,
?
but is that first '150' pa...
2016 Jun 08
2
Instruction Itineraries: question about operand latencies
...of the load numbers high, such as:
>>
>> InstrItinData< II_LOAD1, [InstrStage<150, [AGU]>]>,
>>
>> However, I see that there is another field which I haven't specified
>> where operand latencies are specified. Here's an example from
>> ARMScheduleA8.td:
>>
>> InstrItinData<IIC_iALUi ,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2]>,
>>
>> Now I'm wondering if Instead of what I had above, I should instead have
>> specified:
>>
>> InstrItinData< II_LOAD1, [InstrStage<150, [AGU...