Displaying 2 results from an estimated 2 matches for "armfreg".
2012 Mar 21
4
[LLVMdev] apparent mistake in several ports register td file ???
...bits<4> num, string n, list<Register> subregs = []> :
Register<n> {
field bits<4> Num;
let Namespace = "ARM";
let SubRegs = subregs;
// All bits of ARM registers with sub-registers are covered by
sub-registers.
let CoveredBySubRegs = 1;
}
class ARMFReg<bits<6> num, string n> : Register<n> {
field bits<6> Num;
let Namespace = "ARM";
}
class SparcReg<string n> : Register<n> {
field bits<5> Num;
let Namespace = "SP";
}
Then subsequently, further derived types copy the mis...
2012 Mar 23
0
[LLVMdev] apparent mistake in several ports register td file ???
...gs = []> :
> Register<n> {
> field bits<4> Num;
> let Namespace = "ARM";
> let SubRegs = subregs;
> // All bits of ARM registers with sub-registers are covered by
> sub-registers.
> let CoveredBySubRegs = 1;
> }
>
> class ARMFReg<bits<6> num, string n> : Register<n> {
> field bits<6> Num;
> let Namespace = "ARM";
> }
>
> class SparcReg<string n> : Register<n> {
> field bits<5> Num;
> let Namespace = "SP";
> }
>
&g...