search for: armconstantislandpass

...e are using a slightly patched version of LLVM 4.0. The transition to LLVM 4.0 had been fairly pain-free on x86 (at least excluding the standard suite of assertion failures using MSVC SEH, but that's fairly under control), but we have encountered several scary bugs in ARM, most specifically in ARMConstantIslandPass.cpp: - https://github.com/rust-lang/rust/issues/41672 - https://github.com/rust-lang/rust/issues/42248 The former of these is a fairly benign assertion failure, but the latter is a scary "in the wild" wrong codegen bug, which can really mess up with programmers. Both of the bugs have...

Hi llvm developers, I might be overlooking something, but I think the ARMConstantIsland pass uses the wrong size for the MachineInstrs representing jump tables: Currently, there is the following calculation in doInitialJumpTablePlacement (lib/Target/ARM/ARMConstantIslandPass.cpp:588): ---------------------------------------------------------------------- unsigned Size = JT[JTI].MBBs.size() * sizeof(uint32_t); ---------------------------------------------------------------------- Obviously, a size of 4 bytes per entry is incorrect for jump tables consisting of byte or...

...r correctness or architectural elegance or formatting comment white-space, I mean). Is he alone or are there others working toward such improvements? The subject of two of his commits dealt with substituting MOVW/MOVT pairs for an LDR and a lit-pool. Isn't this what MachineConstantPool and ARMConstantIslandPass was all about? I vaguely recall a while back that it was disabled by some Darwin snob who thought no useful target benefited from it. What about enabling it again? Perhaps you've noticed in the last two months that someone's been porting it to the MIPS target, suggesting to me that it...

ARM has its own pass to do this (ARMConstantIslandPass.cpp). At some point of time we'd like to rip out the branch relaxation part and make it into a target independent pass. Evan On Aug 13, 2009, at 10:02 AM, Bagel wrote: > I think I have read that there are plans to generate object code > (e.g. ELF) > directly in addition to ass...

...ectness or architectural elegance or formatting comment white-space, I mean). Is he alone or are there others working toward such improvements? > > The subject of two of his commits dealt with substituting MOVW/MOVT pairs for an LDR and a lit-pool. Isn't this what MachineConstantPool and ARMConstantIslandPass was all about? I vaguely recall a while back that it was disabled by some Darwin snob who thought no useful target benefited from it. You recall incorrectly. > What about enabling it again? Perhaps you've noticed in the last two months that someone's been porting it to the MIPS target,...

I think I have read that there are plans to generate object code (e.g. ELF) directly in addition to assembly language source. If so, are there plans to support branch relaxation for targets which support long/short branch displacements? This is typically done in assemblers. thanks, bagel

In looking at the code in ARMConstantislandPass.cpp::optimizeThumb2JumpTables(), I see that there is the following condition for not creating tbb-based jump tables: // The instruction should be a tLEApcrel or t2LEApcrelJT; we want // to delete it as well. MachineInstr *LeaMI = PrevI; if ((LeaMI->getOpcode() != A...

...stack smaller is good for cache use and very important on targets where loads have limited displacement like ppc, thumb, mips, sparc, etc. This should be done as a pass before prolog epilog insertion. This is now done for register allocator temporaries, but not for allocas. Finally there's the ARMConstantIslandPass. Conceptually I get the idea, islands water yes yes... place constants close to the code. I'd just like to whiteboard it with someone so I can have a better understanding! Maybe we could learn something together. Hope to see you there! I'm a very fast learner, maybe I can help you with...

Hi Jakob, You're the unfortunate soul who last touched the constant island pass, right? Do you happen to have any insight for Daniel? Chad On Tue, Jul 23, 2013 at 9:55 AM, Daniel Stewart <stewartd at codeaurora.org>wrote: > In looking at the code in > ARMConstantislandPass.cpp::optimizeThumb2JumpTables(), I see that there is > the following condition for not creating tbb-based jump tables:**** > > ** ** > > // The instruction should be a tLEApcrel or t2LEApcrelJT; we want*** > * > > // to delete it as well.**** > > *Mac...

...ler is good for cache use and very important on targets where loads have limited displacement like ppc, thumb, mips, sparc, etc. This should be done as a pass before prolog epilog insertion. This is now done for register allocator temporaries, but not for allocas. > > Finally there's the ARMConstantIslandPass. Conceptually I get the idea, islands water yes yes... place constants close to the code. I'd just like to whiteboard it with someone so I can have a better understanding! Maybe we could learn something together. > > Hope to see you there! I'm a very fast learner, maybe I can hel...

...to have any insight for Daniel? Sorry, no. I don't remember working with that particular bit of code. You could try digging through the commit logs. Thanks, /jakob > On Tue, Jul 23, 2013 at 9:55 AM, Daniel Stewart <stewartd at codeaurora.org> wrote: > In looking at the code in ARMConstantislandPass.cpp::optimizeThumb2JumpTables(), I see that there is the following condition for not creating tbb-based jump tables: > > > > // The instruction should be a tLEApcrel or t2LEApcrelJT; we want > > // to delete it as well. > > MachineInstr *LeaMI = PrevI...

Hi Gary, On 3 December 2013 22:01, Gary Fuehrer <gfuehrer at defiant-tech.com> wrote: > The subject of two of his commits dealt with substituting MOVW/MOVT pairs > for an LDR and a lit-pool. Isn't this what MachineConstantPool and > ARMConstantIslandPass was all about? Both are essential components to using lit-pools: the MachineConstantPool is just LLVM's underlying machinery and ARMConstantIslands is for fixing up out of range loads and so on so they can actually be used. My recent changes have been to fix Darwin CodeGen so that they're...

Hi Tim, Thank you for your answer. *We've fairly recently fixed a bug that looks very similar (r238680,which was well after 3.6)* If I wanted to back port that to 3.5 where should I look at? Where in the ARM backend the decision to relax an instruction is taken? *That's weird. Even with "-filetype=obj" (the bug only occurs whendirectly writing an object file)? Not that it

...tant should be stored in .text section, after the load instruction, and offset should be computed at compile time (not link time). I struggle to find out : - how llvm handle constant pool - where I should compute the offset (MCCodeEmitter ? MCInstLowering ? ... ?) ARM has a specific pass for this (ARMConstantIslandPass.cpp), but I wonder if such a processing is really needed, at least for simple case (i.e. small enough offset). Handling this with relocations and linker-hacking seems odd, I'd prefer to avoid it. Thanks for you help, either with some advice on the implementation strategy, or with and example i...

After looking at this for a while, I do not think that this problem is NP-hard. With a finite "short branch" displacement k, I was not able to come up with a gadget that could create global constraints as would be needed to e.g. model an instance of 3SAT or vertex cover in terms of this problem. The problem is hard though. I believe that it is likely to be exponential in the "short

...ing clang 3.7 and it fails with the >> same >> > error. >> > Where should I look at in the ARM backend to understand what happens? >> > Where the jump table instruction is generated and supposed to be >> relaxed? >> >> Have a look at lib/Target/ARM/ARMConstantIslandPass.cpp, especially >> where Tim's patch touches: >> >> http://llvm.org/viewvc/llvm-project?view=revision&revision=238680 >> >> Instruction relaxation rules should be in the TableGen files, I think, >> but that means it could be in a number of places. >&gt...

...ze = TII.GetFunctionSize(MF); > // Force LR to be spilled if the Thumb function size is > 2048. > This enables > // use of BL to implement far jump. If it turns out that it's > not needed > // then the branch fix up path will undo it. > Index: lib/Target/ARM/ARMConstantIslandPass.cpp > =================================================================== > --- lib/Target/ARM/ARMConstantIslandPass.cpp (revision 49716) > +++ lib/Target/ARM/ARMConstantIslandPass.cpp (working copy) > @@ -368,7 +368,7 @@ > for (MachineBasicBlock::iterator I = MBB.begin(), E = MB...

OK, here's a new patch that adds the infrastructure and the implementation for X86, ARM and PPC of GetInstSize and GetFunctionSize. Both functions are virtual functions defined in TargetInstrInfo.h. For X86, I moved some commodity functions from X86CodeEmitter to X86InstrInfo. What do you think? Nicolas Evan Cheng wrote: > > I think both of these belong to TargetInstrInfo. And

Hello, I’m writing machine function passes for programs running with ARMv7-M ISA. My pass adds some instructions to the original code, and now I got fatal error: error in backend: out of range pc-relative fixup value when llvm generates native code after running the transformation pass. I think it’s because my transformation pass increases the size of the original code and thus some branch