search for: armasm

...X on. I just committed a > fix in svn/git. Let me know if it works for you now. > > Thanks again for reporting the bug. > > Jean-Marc > Thank you, problem is gone now! Oleg PS. I just finished math_approx.asm (speed optimized version for ARM). The code can be compiled using armasm utility that comes with VS2005. Math functions work up to 2...2.5 times faster now. Are you interested in adding it to the project? Also, have you made some profiling on the project? I mean do you know any bottle necks that can be speed-optimized a bit (both encoder and decoder)

...M Dev; Logan Chien; Gabor Ballabas; Rafael Espíndola; Richard Barton; Amara Emerson Subject: Re: Add support for ldr pseudo instruction in ARM integrated assembler On 25 October 2013 18:33, David Peixotto < <mailto:dpeixott at codeaurora.org> dpeixott at codeaurora.org> wrote: Both armasm and gnu as support an ldr pseudo instruction for loading constants that lowers to either a mov, movn, or a pc-relative ldr from the constant pool. It would be great if the llvm integrated assembler could support this feature as well. Hi David, As much as I think that it's important to a...

...avid Peixotto > Cc: LLVM Dev; Logan Chien; Gabor Ballabas; Rafael Espíndola; Richard Barton; Amara Emerson > Subject: Re: Add support for ldr pseudo instruction in ARM integrated assembler > > On 25 October 2013 18:33, David Peixotto <dpeixott at codeaurora.org> wrote: > Both armasm and gnu as support an ldr pseudo instruction for loading > constants that lowers to either a mov, movn, or a pc-relative ldr from the > constant pool. It would be great if the llvm integrated assembler could > support this feature as well. > > Hi David, > > As much as I thi...

...d" } EmitCodeMappingSymbol -> { nop on base class, calling either EmitThumbMappingSymbol or EmitARMMappingSymbol (private) on ARM } > +void MCELFStreamer::EmitMappingSymbol(bool IsData) { > + // FIXME: The following is specific to the ARM. This should be moved > + // to ARMAsmBackend. Maybe MCARMELFStreamer (or whatever sounds nicer than that). ARMAsm is a big bag of code and nowadays, most of it is format agnostic, I think (asm, elf). -- cheers, --renato http://systemcall.org/

Both armasm and gnu as support an ldr pseudo instruction for loading constants that lowers to either a mov, movn, or a pc-relative ldr from the constant pool. It would be great if the llvm integrated assembler could support this feature as well. For example, using gnu as to compile this code: .text fo...

...ld be a *really* weird implementation, but would it be legal > according to this spec? If so, the ISB provides *no* guarantees.) > > Reference: > http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/CIHGHHIE.html You've actually linked to the assembler (as in "armasm") reference manual there. The architectural documentation of these barriers is better, though still not airtight in my opinion. From section A3.8.3, the bit about "program order" is new, and it's after the ISB has *completed*: "An ISB instruction flushes the pipeline in the...

Hi Ashi, Your first LDR is a pseudoinstruction that is supported by some tools (gas and armasm, at least), but not by LLVM. Roughly speaking, it turns into a PC-relative load from a literal pool. To do what you're trying to achieve you can write your own literal pool in your assembly. You can see some examples of this sort of thing at https://github.com/tianocore/edk2/blob/master/Arm...

...FLAG) $^ -o $@ clean: rm *.o libtest.dylib test //==end Makefile== Cheers, Ashi On Wed, Mar 6, 2013 at 11:59 PM, Bernie Ogden <bogden at arm.com> wrote: > Hi Ashi,**** > > ** ** > > Your first LDR is a pseudoinstruction that is supported by some tools (gas > and armasm, at least), but not by LLVM. Roughly speaking, it turns into a > PC-relative load from a literal pool.**** > > ** ** > > To do what you're trying to achieve you can write your own literal pool in > your assembly. You can see some examples of this sort of thing at > https://...

...25, 2013 1:11 PM To: David Peixotto Cc: LLVM Dev; Logan Chien; Gabor Ballabas; Rafael Espíndola; Richard Barton; Amara Emerson Subject: Re: Add support for ldr pseudo instruction in ARM integrated assembler On 25 October 2013 18:33, David Peixotto <dpeixott at codeaurora.org> wrote: Both armasm and gnu as support an ldr pseudo instruction for loading constants that lowers to either a mov, movn, or a pc-relative ldr from the constant pool. It would be great if the llvm integrated assembler could support this feature as well. Hi David, As much as I think that it's important to a...

On 25 October 2013 18:33, David Peixotto <dpeixott at codeaurora.org> wrote: > Both armasm and gnu as support an ldr pseudo instruction for loading > constants that lowers to either a mov, movn, or a pc-relative ldr from the > constant pool. It would be great if the llvm integrated assembler could > support this feature as well. > Hi David, As much as I think that it's...

...avid Peixotto > Cc: LLVM Dev; Logan Chien; Gabor Ballabas; Rafael Espíndola; Richard Barton; Amara Emerson > Subject: Re: Add support for ldr pseudo instruction in ARM integrated assembler > > On 25 October 2013 18:33, David Peixotto <dpeixott at codeaurora.org> wrote: > Both armasm and gnu as support an ldr pseudo instruction for loading > constants that lowers to either a mov, movn, or a pc-relative ldr from the > constant pool. It would be great if the llvm integrated assembler could > support this feature as well. > > Hi David, > > As much as I thi...

...bol -> { nop on base class, calling either > EmitThumbMappingSymbol or EmitARMMappingSymbol (private) on ARM } > > > > +void MCELFStreamer::EmitMappingSymbol(bool IsData) { > > + // FIXME: The following is specific to the ARM. This should be moved > > + // to ARMAsmBackend. > > Maybe MCARMELFStreamer (or whatever sounds nicer than that). ARMAsm is > a big bag of code and nowadays, most of it is format agnostic, I think > (asm, elf). > > > -- > cheers, > --renato > > http://systemcall.org/ > -------------- next part ---------...

...purposes. I've placed it below the TRAP variants already defined, and those are decoded in preference to it, so that isn't an issue, and it has no pattern so should never occur during codegen. It seems as though none of the gas versions I've tried know this mnemonic; Microsoft's armasm from VS 2012 (which I believe is based heavily on ARM's assembler) recognizes both UDF and UND for this instruction. IDA 6.4 disassembles it as UND. The current manual says UDF. Does anyone have a preference for this? I'm planning on making the default disassembly string UND since it...

> I put the test in a separate file and forgot to attach it earlier. I've > attached it to this email. The ".space" directive could be very useful in making the test more manageable. Other than that I'd be wary of instructions that might be relaxed during object emission and suddenly make a load out of range. LLVM seems to do this for Bcc, pc-relative loads, ADR and B.

On Fri, Oct 25, 2013 at 1:33 PM, David Peixotto <dpeixott at codeaurora.org>wrote: > Both armasm and gnu as support an ldr pseudo instruction for loading > constants that lowers to either a mov, movn, or a pc-relative ldr from the > constant pool. It would be great if the llvm integrated assembler could > support this feature as well. > > For example, using gnu as to compile thi...

Hi Jean-Marc >> I tested it on Windows Mobile 5.0 PocketPC platform with several >> different applications (duplex voice capturing/encoding/decoding/playback). >> If I use any recent libspeex version >=13186, application exits in 2-3 >> seconds after I stop to talk :(. >> > by exit, you mean segfault (or whatever the Windows equivalent is), a > division

Hi Tim, > > 8. Check that an error is issued when the constant pool would be > > placed too far away > > I'd say this one is actually the most involved constraint but there don't > actually seem to be any tests in the attached file for it. I put the test in a separate file and forgot to attach it earlier. I've attached it to this email. I can't say how

...nst MCInst &Inst); + virtual void EmitMappingSymbol(bool IsData); void fixSymbolsInTLSFixups(const MCExpr *expr); @@ -119,6 +123,11 @@ private: std::vector<LocalCommon> LocalCommons; SmallPtrSet<MCSymbol *, 16> BindingExplicitlySet; + + // FIXME: This information is in ARMAsmBackend, but we currently + // have no way to reach it. + bool IsThumb; + int64_t MappingSymbolCounter; /// @} void SetSection(StringRef Section, unsigned Type, unsigned Flags, SectionKind Kind) { @@ -130,18 +139,21 @@ private: ELF::SHF_WRITE |ELF::...

This is required in order to build using the built-in assembler in clang. --- celt/arm/celt_pitch_xcorr_arm.s | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/celt/arm/celt_pitch_xcorr_arm.s b/celt/arm/celt_pitch_xcorr_arm.s index 09917b1..3c4b950 100644 --- a/celt/arm/celt_pitch_xcorr_arm.s +++ b/celt/arm/celt_pitch_xcorr_arm.s @@ -309,7 +309,7 @@

Hi, What would be the proper syntax in a C file, using inline assembly, to load a immediate value into an ARM register using clang & integrated assembler? The following syntax is rejected by LLVM: // clang -target armv7em-none-eabi -mthumb #define CONSTANT 0x1234 void __attribute__((naked)) foo(void) { asm volatile ( "ldr r0, =%0 \n"