Displaying 2 results from an estimated 2 matches for "armarchenum".
2009 Dec 02
2
[LLVMdev] thumb2 has divide instructions
Anton Korobeynikov wrote:
> Hello
> "T2Divide" should be a subtarget feature bit. This way it can be
> "automatically" assigned to the procesor.
I agree this is a better approach.
> The instruction selection patterns for t2{S,U}DIV should be also
> guarded by this predicate.
Is this necessary? Since the absence of the predicate causes lowering to
expand
2009 Dec 02
0
[LLVMdev] thumb2 has divide instructions
Hello
> Is this necessary? Since the absence of the predicate causes lowering to
> expand divides, the pattern should never show up.
Just to guard codegen bugs. If anything went wrong (when predicates
will be used) then you'll get nice assertion "cannot yet select".
> Agreed. Now how do we get this done?
Just look how ArmV7A is defined and do something similar...
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