Displaying 3 results from an estimated 3 matches for "arm_am".
2011 Jun 22
0
[LLVMdev] ARM thumb-2 instruction used for non-thumb2 CPUs
...b/contrib/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
@@ -44,17 +44,18 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
const MCOperand &MO2 = MI->getOperand(2);
const MCOperand &MO3 = MI->getOperand(3);
- O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()));
+ O << '\t' << "mov";
printSBitModifierOperand(MI, 6, O);
printPredicateOperand(MI, 4, O);
O << '\t' << getRegisterName(Dst.getReg())
- << ", " << ge...
2011 Jun 22
2
[LLVMdev] ARM thumb-2 instruction used for non-thumb2 CPUs
On Jun 22, 2011, at 9:00 AM, Renato Golin wrote:
> On 22 June 2011 16:50, Jim Grosbach <grosbach at apple.com> wrote:
>>> This sounds like a dead end as newer binutils are GPLv3.
>>
>> Yeah, that's definitely a very real concern and a big motivation to get the MC based asm parser whipped into usable shape. We're much more in control of our own destiny then.
2011 Jun 22
2
[LLVMdev] ARM thumb-2 instruction used for non-thumb2 CPUs
...get/ARM/InstPrinter/ARMInstPrinter.cpp
> @@ -44,17 +44,18 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
> const MCOperand &MO2 = MI->getOperand(2);
> const MCOperand &MO3 = MI->getOperand(3);
>
> - O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()));
> + O << '\t' << "mov";
> printSBitModifierOperand(MI, 6, O);
> printPredicateOperand(MI, 4, O);
>
> O << '\t' << getRegisterName(Dst.getReg())
> - <<...