search for: arm1136j

Hello, I want to compile a LLVM file into an executable running on ARM platform. I use LLVM 2.0 with the following command lines: llvm-as -f -o test.bc test.ll llc -march=arm -mcpu=arm1136j-s -mattr=+v6 -f -o test.s test.bc arm-linux-gnu-as -mcpu=arm1136j-s test.s With the last command, I obtain the following error: rd and rm should be different in mul The bad instruction is "mul r3, r3, r2" that follows the syntax "mul rd, rm, rs". I want to know wh...

...eltier, Mikael <m-peltier at ti.com>: > > > > > Hello, > > > > I want to compile a LLVM file into an executable running on ARM platform. > > I use LLVM 2.0 with the following command lines: > > llvm-as -f –o test.bc test.ll > > llc –march=arm –mcpu=arm1136j-s –mattr=+v6 –f –o test.s test.bc > > arm-linux-gnu-as –mcpu=arm1136j-s test.s > > > > With the last command, I obtain the following error: > > rd and rm should be different in mul > > > > The bad instruction is "mul r3, r3, r2" that follows the syntax...

I tried a couple of options (-mcpu=arm1136j-s, -mcpu=arm1136jf-s, -march=armv6, ...) to let the compile know the specific ARM processor, but the same issue is still there. I tried to take a look at .s file in /tmp directory, but it's already cleaned up. Is it because I enabled the optimization option when I compiled llvm? Regards, Won...

...want to know if there is another way to do this, for instance, by accessing the address of label and to branch directly to it? In order to optimize the program (to decrease the cost of branch dispatch), I use the following command line: llvmc -O5 -o branch_opt branch.bc llc -march=arm -mcpu=arm1136j-s -mattr=+v6 -f -o branch_opt.s branch_opt.bc In the optimized program (branch_opt.arm), I saw that all branches are not suppressed. I want to know, if it is possible to suppress the remaining useless branches? if yes, how ? Thanks in advance. Mikaël. -------------- next part -------...

On Jul 8, 2009, at 12:52 PMPDT, Won J Jeon wrote: > I tried a couple of options (-mcpu=arm1136j-s, -mcpu=arm1136jf-s, - > march=armv6, ...) to let the compile know the specific ARM > processor, but the same issue is still there. I tried to take a look > at .s file in /tmp directory, but it's already cleaned up. Is it > because I enabled the optimization option when I co...

...ld take a look at the lines and all of them have smull instruction like 'smull r0, r1, r0, r1'. Won On Wed, Jul 8, 2009 at 2:54 PM, Dale Johannesen <dalej at apple.com> wrote: > > On Jul 8, 2009, at 12:52 PMPDT, Won J Jeon wrote: > > I tried a couple of options (-mcpu=arm1136j-s, -mcpu=arm1136jf-s, > -march=armv6, ...) to let the compile know the specific ARM processor, but > the same issue is still there. I tried to take a look at .s file in /tmp > directory, but it's already cleaned up. Is it because I enabled the > optimization option when I compiled l...

Well how about as a strawman... taking some options from http://en.wikipedia.org/wiki/List_of_ARM_microprocessor_cores and http://en.wikipedia.org/wiki/List_of_applications_of_ARM_cores LLVM Supports: ARMv4T -> ARM7TDMI ARMv5TE -> ARM926EJ-S -> XScale ARMv6 -> ARM1136J(F)-S ARMv6ZK -> ARM1176JZ(F)-S ARMv7A -> Cortex-A8 Cortex-A9 ARMv7M -> Cortex-M3 Granted there are many many more listed within in ARM.td, but I think we should start with a small subset and build on it as we begin guaranteeing maintenance. Once we compile a set of ISAs and...

On Jul 8, 2009, at 11:04 AMPDT, Won J Jeon wrote: > Hello, > > I built a llvm toolchain for ARM and I'm trying to build a simple > application on ARM using LLVM. When I compiled the code, it has the > following message and the binary code has a segmentation fault when > it is executed. > > /tmp/ccJPjMe4.s: Assembler messages: > /tmp/ccJPjMe4.s:4250: rdhi, rdlo

On Thu, Oct 13, 2011 at 11:25 AM, Joe Abbey <jabbey at arxan.com> wrote: > LLVM Supports: > ARMv4T  -> ARM7TDMI > ARMv5TE -> ARM926EJ-S >         -> XScale > ARMv6   -> ARM1136J(F)-S > ARMv6ZK -> ARM1176JZ(F)-S > ARMv7A  -> Cortex-A8 >            Cortex-A9 > ARMv7M  -> Cortex-M3 Does the LLVM code generator generate Thumb code in addition to ARM code? For those who don't know ARM, Thumb is a subset of ARM in which each instruction is 16-bits in s...

Hello, I built a llvm toolchain for ARM and I'm trying to build a simple application on ARM using LLVM. When I compiled the code, it has the following message and the binary code has a segmentation fault when it is executed. /tmp/ccJPjMe4.s: Assembler messages: /tmp/ccJPjMe4.s:4250: rdhi, rdlo and rm must all be different /tmp/ccJPjMe4.s:4589: rdhi, rdlo and rm must all be different

> The ARM Holdings emulator does this; I used it with great success to > profile an Advanced Encryption Standard encryptor a while back. It is indeed a useful piece of kit. We do a lot of our internal regression tests on it, and also run LLVM's regression tests every night on it (as well as PlumHall, EEMBC and SpecInt). Unfortunately it's not exactly software we can give away or