Displaying 20 results from an estimated 43 matches for "arais".
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arai
2012 Apr 02
1
Which license is applied to "debian rules" in the Libogg?
Hello, ogg-dev team.
I'm Takeo Arai.
I am investigating the license of Open Sorce Software.
[Question]
Which license is applied to "debian rules"?
The "debian rules" was detected in the Debian folder that is contained in
the Libogg
?BSD 3-clause License? component.
- Download: libogg-1.1.3.tar.gz
< http://downloads.xiph.org/releases/ogg/ >
Is this "debian
2006 Jul 28
0
Re: MS RDO database bug
It's now in wine bugs
http://bugs.winehq.org/show_bug.cgi?id=5786
El vie, 28-07-2006 a las 09:53 -0700, Benjamin Arai escribi?:
> Jst create an account in the website I specified before. Log in and
> choose "Enter Bug" under the Bugzilla Menu. Then just choose "Wine"
> for the type of bug and enter in the information. Once you have
> created the bug ticket
2006 Jun 18
5
User/Password Management: Mapping items to inidividual users
Is there a good plugin that does per page authentication management?
For example, I want to allow users to create pages and share them with
specific users, all users, or none at all on a per page basis.
Benjamin
--
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2020 Nov 06
2
Loop-vectorizer prototype for the EPI Project based on the RISC-V Vector Extension (Scalable vectors)
On 11/6/20 12:39 PM, Sjoerd Meijer wrote:
Hello Simon,
Thanks for your replies, very useful. And yes, thanks for the example and making the target differences clear:
; Some examples:
; RISC-V V & VE(*):
; %mask = (splat i1 1)
; %evl = min(256, %n - %i)
; MVE/SVE :
; %mask = get.active.lane.mask(%i, %n)
; %evl = call @llvm.vscale()
; AVX:
; %mask = icmp (%i + (seq
2018 Jun 08
4
[RFC] Porting MachinePipeliner to AArch64+SVE
Hi,
I am extending LLVM for HPC applications.
As one of them, I am trying to make MachinePipeliner available on
AArch64 + Scalable Vector Extension environment.
MachinePipeliner is currently used only by Hexagon CPU.
Since it is a very portable implementation, I think that it will
actually work just by adding a little code for many CPUs(See Code [2]).
The current MachinePipeliner is written on
2008 Jan 16
2
Escaping special characters :, (, ), [, ], {, }, !, +, ", ~, ^, -, |, <, >, =, *, ?, \
Hello,
I am trying to escape words for searching i.e., "hello". The key here
is that the two L''s on "hello" are actually vertical bars. Is there
a special function in Ferret or anywhere for that matter that will do
the escaping of the Ferret special characters?
Thanks in advance,
Benjamin
2007 Dec 20
1
indexing tuples (example: "frog" => 123) as opposed to words
Hi,
I need to map words in a document back to there original word id''s in my
database. For example, if I had the sentence "I eat food" and I was
searching for "food" I would obviously get the document back as a
result. For my particular problem I need to not only get the document id
but also the id of the match.
Suppose my original sentence was actually
2018 Jul 24
2
Software pipeline using LLVM
Hi all,
I want to generate assembly code using Swing Modulo Scheduling in LLVM for many ALU (May could be Adders, multilayer ......), I need some help how I can do that, which commend I run?
Also if possible more information about the scheduling and the register location ......, and which pass responsible about that, and which LLVM version support Swing Modulo Scheduling.
Thank you.
Regards
2020 Nov 09
0
Loop-vectorizer prototype for the EPI Project based on the RISC-V Vector Extension (Scalable vectors)
; RISC-V V & VE(*):
; %mask = get.active.lane.mask(%i, %i)
; %evl = min(256, %n - %i)
; MVE/SVE/AVX :
; %mask = get.active.lane.mask(%i, %n)
; %evl = call @llvm.vscale()
For VE, we want to do as much predication as possible through %evl and as little as possible with %mask. This has performance implications on VE and RISC-V - VE does not generate a mask from %evl but %evl is
2007 Apr 18
0
[RFC, PATCH 15/24] i386 Vmi apic header
Move APIC read / write accessors to sub-arch layer. Note that we
don't bother to implement apic_write_atomic any different, as it
is only present to work around old processor erratums (Pentium
Processor Spec update 11AP), and VMI kernels do not offer support
for this class of processor.
Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Daniel Arai <arai@vmware.com>
2007 Apr 18
0
[RFC, PATCH 15/24] i386 Vmi apic header
Move APIC read / write accessors to sub-arch layer. Note that we
don't bother to implement apic_write_atomic any different, as it
is only present to work around old processor erratums (Pentium
Processor Spec update 11AP), and VMI kernels do not offer support
for this class of processor.
Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Daniel Arai <arai@vmware.com>
2020 Nov 05
0
Loop-vectorizer prototype for the EPI Project based on the RISC-V Vector Extension (Scalable vectors)
Hi all,
On 11/5/20 10:32 AM, Roger Ferrer Ibáñez wrote:
Hi Sjoerd,
thanks for pointing us to this intrinsic.
I see it returns a mask/predicate type. My understanding is that VPred intrinsics have both a vector length operand and a mask operand. It looks to me that a "popcount" of get.active.lane.mask would correspond to the vector length operand. Then additional "control
2020 Nov 05
2
Loop-vectorizer prototype for the EPI Project based on the RISC-V Vector Extension (Scalable vectors)
For RISC-V V and VE being explicit about %evl is important for performance & correctness and that is what VP does. The get.active.lane.mask intrinsic is used as a hint for the MVE, SVE backends to use hardware tail-predication (the backends reverse engineer that hint by pattern matching for get.active.lane.mask in the mask parameter of "some" masked intrinsics). IMHO, it's more
2003 Oct 30
2
conflicts(detail=TRUE)
Dear all,
Could somebody please explain what the following conflict is about?
best
mahmood
R> conflicts(detail=TRUE)
$"package:methods"
[1] "body<-"
$"package:base"
[1] "body<-"
R>
PS: I send an earlier mail yesterday on this subject
that was definitly not clear, therefore I try again.
http://www.ne.su.se/~ma
2008 Jan 11
3
Date range queries return zero results
Hello,
I am having trouble getting data ranges to work correctly. I am using
the following command to load the db:
index << {:title => row[7].to_i,
:date => Date.strptime(row[3], ''%Y-%m-%d''),
:page_id => row[5].to_i,
:page => row[6].to_i,
:content_type => row[1].to_i,
2020 Nov 06
4
Loop-vectorizer prototype for the EPI Project based on the RISC-V Vector Extension (Scalable vectors)
On 11/6/20 8:49 AM, Roger Ferrer Ibáñez wrote:
Hi Sjoerd,
Trying to remember how everything fits together here, but could get.active.lane.mask not create the %mask of the VP intrinsics? Or in other words, in the vectoriser, who's producing the %mask and %evl that is consumed by the VP intrinsics?
I'm not sure what would be the best way here. I think about the Loop Vectorizer. I imagine
2007 Apr 18
2
[RFC, PATCH 9/24] i386 Vmi smp support
SMP bootstrapping support. Just as in the physical platform model,
the BSP is responsible for initializing the AP state prior to execution.
The dependence on lots of processor state information is a design choice
of our implementation. Conceivably, this could be a hypercall that
awakens the same start of day state on APs as on the BSP.
It is likely the AP startup and the start-of-day model will
2007 Apr 18
2
[RFC, PATCH 9/24] i386 Vmi smp support
SMP bootstrapping support. Just as in the physical platform model,
the BSP is responsible for initializing the AP state prior to execution.
The dependence on lots of processor state information is a design choice
of our implementation. Conceivably, this could be a hypercall that
awakens the same start of day state on APs as on the BSP.
It is likely the AP startup and the start-of-day model will
2020 Nov 06
0
Loop-vectorizer prototype for the EPI Project based on the RISC-V Vector Extension (Scalable vectors)
Hello Simon,
Thanks for your replies, very useful. And yes, thanks for the example and making the target differences clear:
; Some examples:
; RISC-V V & VE(*):
; %mask = (splat i1 1)
; %evl = min(256, %n - %i)
; MVE/SVE :
; %mask = get.active.lane.mask(%i, %n)
; %evl = call @llvm.vscale()
; AVX:
; %mask = icmp (%i + (seq <8 x i32> 0,1,2,.,)), %n,
; %evl
2006 Jun 18
1
PostgreSQL Database Views with scaffold
Is there way to get the scaffold command to work with PostgreSQL
database views?
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Posted via http://www.ruby-forum.com/.