search for: aptive

Displaying 5 results from an estimated 5 matches for "aptive".

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2011 Mar 04
1
Error: FETCH [1] for mailbox badbox UID 1 got too little data: 2 vs 4 (fwd)
Hi all, Any thoughts about this error? Should I file a bug report somewhere? Cheers, Chris. On Wed, 12 Jan 2011, Chris Wilson wrote: > Hi all, > > I can send myself a test message that causes Dovecot to crash when I open > it in Alpine, with the following error: > > Jan 12 14:52:52 one-mail dovecot: imap(chris): Error: FETCH [1] for > mailbox badbox UID 1 got too
2011 Jan 12
1
Error: FETCH [1] for mailbox badbox UID 1 got too little data: 2 vs 4
Hi all, I can send myself a test message that causes Dovecot to crash when I open it in Alpine, with the following error: Jan 12 14:52:52 one-mail dovecot: imap(chris): Error: FETCH [1] for mailbox badbox UID 1 got too little data: 2 vs 4 Jan 12 14:52:52 one-mail dovecot: imap(chris): Error: Corrupted index cache file /home/chris/mail/.imap/badbox/dovecot.index.cache: Broken MIME parts
2011 Mar 09
2
Migrating to mdbox
Hi all, I think it would be a good idea for me to move from mbox to mdbox, as I have 57,000 messages in my inbox, and clients hang for a minute whenever they request a CHECK, or Dovecot feels the need to run one itself. Looking at past threads: http://www.mail-archive.com/dovecot at dovecot.org/msg35212.html http://comments.gmane.org/gmane.mail.imap.dovecot/53936 it seems that the safest way
2005 Nov 17
2
ZFS portable between architectures, yes or no?
On the intro page (http://www.opensolaris.org/os/community/zfs/intro/) it states that "ZFS has ''adaptive endianness'' to cope with different byte order on different platforms". However in the PDF (ZFS: The Last Word in File Systems) on page 3 it states "Not portable between platforms (e.g. x86 to/from SPARC)" So is it or isn''t it? Thanks, John. This message posted fr...
2017 Jul 13
2
Deprecating the experimental microMIPS64R6 backend
Hi all, I plan to deprecate the experimental microMIPS64R6 backend for the 5.0 release and remove it after the release. Currently there are no CPUs that use that particular sub-ISA which makes it difficult to justify the maintenance and parallel development effort. If there was a CPU design produced that did use microMIPS64R6, the backend could be restored from the archive. Any comments or