Displaying 14 results from an estimated 14 matches for "apic_wait_icr_idl".
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apic_wait_icr_idle
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 04/17] pavarvirt_ops - apci header updates
...d int native_apic_read(unsigned long reg)
{
return *((volatile unsigned int *)(APIC_BASE+reg));
}
+#ifdef CONFIG_PARAVIRT
+#include <asm/paravirt.h>
+#else
+#define apic_write native_apic_write
+#define apic_read native_apic_read
+
+#endif /* CONFIG_PARAVIRT */
+
static __inline__ void apic_wait_icr_idle(void)
{
while (apic_read( APIC_ICR ) & APIC_ICR_BUSY)
--
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 04/17] pavarvirt_ops - apci header updates
...d int native_apic_read(unsigned long reg)
{
return *((volatile unsigned int *)(APIC_BASE+reg));
}
+#ifdef CONFIG_PARAVIRT
+#include <asm/paravirt.h>
+#else
+#define apic_write native_apic_write
+#define apic_read native_apic_read
+
+#endif /* CONFIG_PARAVIRT */
+
static __inline__ void apic_wait_icr_idle(void)
{
while (apic_read( APIC_ICR ) & APIC_ICR_BUSY)
--
2012 Nov 14
0
[PATCH] x86/nmi: self_nmi() should not unconditionally enable interrupts
...struct cpu_user_r
* 8-3 and 8-4 in IA32 Reference Manual Volume 3. We send the IPI to
* our own APIC ID explicitly which is valid.
*/
-void self_nmi(void)
+void self_nmi(void)
{
+ unsigned long flags;
u32 id = get_apic_id();
- local_irq_disable();
+ local_irq_save(flags);
apic_wait_icr_idle();
apic_icr_write(APIC_DM_NMI | APIC_DEST_PHYSICAL, id);
- local_irq_enable();
+ local_irq_restore(flags);
}
static void do_nmi_trigger(unsigned char key)
2007 Apr 18
0
[RFC, PATCH 15/24] i386 Vmi apic header
...eg)) = v;
-}
-
-static __inline void apic_write_atomic(unsigned long reg, unsigned long v)
-{
- xchg((volatile unsigned long *)(APIC_BASE+reg), v);
-}
-
-static __inline unsigned long apic_read(unsigned long reg)
-{
- return *((volatile unsigned long *)(APIC_BASE+reg));
-}
-
static __inline__ void apic_wait_icr_idle(void)
{
while ( apic_read( APIC_ICR ) & APIC_ICR_BUSY )
Index: linux-2.6.16-rc5/include/asm-i386/mach-vmi/mach_apicops.h
===================================================================
--- linux-2.6.16-rc5.orig/include/asm-i386/mach-vmi/mach_apicops.h 2006-03-10 13:03:37.000000000 -0800...
2007 Apr 18
0
[RFC, PATCH 15/24] i386 Vmi apic header
...eg)) = v;
-}
-
-static __inline void apic_write_atomic(unsigned long reg, unsigned long v)
-{
- xchg((volatile unsigned long *)(APIC_BASE+reg), v);
-}
-
-static __inline unsigned long apic_read(unsigned long reg)
-{
- return *((volatile unsigned long *)(APIC_BASE+reg));
-}
-
static __inline__ void apic_wait_icr_idle(void)
{
while ( apic_read( APIC_ICR ) & APIC_ICR_BUSY )
Index: linux-2.6.16-rc5/include/asm-i386/mach-vmi/mach_apicops.h
===================================================================
--- linux-2.6.16-rc5.orig/include/asm-i386/mach-vmi/mach_apicops.h 2006-03-10 13:03:37.000000000 -0800...
2007 Apr 18
2
refactoring io_apic.c
...int __init verify_local_APIC(void)
return 1;
}
-void __init sync_Arb_IDs(void)
-{
- /* Unsupported on P4 - see Intel Dev. Manual Vol. 3, Ch. 8.6.1 */
- unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
- if (ver >= 0x14) /* P4 or higher */
- return;
- /*
- * Wait for idle.
- */
- apic_wait_icr_idle();
-
- apic_printk(APIC_DEBUG, "Synchronizing Arb IDs.\n");
- apic_write_around(APIC_ICR, APIC_DEST_ALLINC | APIC_INT_LEVELTRIG
- | APIC_DM_INIT);
-}
-
extern void __error_in_apic_c (void);
/*
diff -purN -X /home/mbligh/.diff.exclude virgin/arch/i386/kernel/io_apic.c io_apic_split...
2007 Apr 18
2
refactoring io_apic.c
...int __init verify_local_APIC(void)
return 1;
}
-void __init sync_Arb_IDs(void)
-{
- /* Unsupported on P4 - see Intel Dev. Manual Vol. 3, Ch. 8.6.1 */
- unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
- if (ver >= 0x14) /* P4 or higher */
- return;
- /*
- * Wait for idle.
- */
- apic_wait_icr_idle();
-
- apic_printk(APIC_DEBUG, "Synchronizing Arb IDs.\n");
- apic_write_around(APIC_ICR, APIC_DEST_ALLINC | APIC_INT_LEVELTRIG
- | APIC_DM_INIT);
-}
-
extern void __error_in_apic_c (void);
/*
diff -purN -X /home/mbligh/.diff.exclude virgin/arch/i386/kernel/io_apic.c io_apic_split...
2007 Aug 08
19
Introducing paravirt_ops for x86_64
Hi folks,
After some time away from it, and a big rebase as a consequence, here is
the updated version of paravirt_ops for x86_64, heading to inclusion.
Your criticism is of course, very welcome.
Have fun
--
arch/x86_64/Kconfig | 11
arch/x86_64/ia32/syscall32.c | 2
arch/x86_64/kernel/Makefile | 1
arch/x86_64/kernel/apic.c | 2
2007 Aug 08
19
Introducing paravirt_ops for x86_64
Hi folks,
After some time away from it, and a big rebase as a consequence, here is
the updated version of paravirt_ops for x86_64, heading to inclusion.
Your criticism is of course, very welcome.
Have fun
--
arch/x86_64/Kconfig | 11
arch/x86_64/ia32/syscall32.c | 2
arch/x86_64/kernel/Makefile | 1
arch/x86_64/kernel/apic.c | 2
2007 Apr 18
2
[PATCH] x86_64 paravirt_ops port
...d int native_apic_read(unsigned long reg)
{
return *((volatile unsigned int *)(APIC_BASE+reg));
}
+#ifdef CONFIG_PARAVIRT
+#include <asm/paravirt.h>
+#else
+#define apic_write native_apic_write
+#define apic_read native_apic_read
+
+#endif /* CONFIG_PARAVIRT */
+
static __inline__ void apic_wait_icr_idle(void)
{
while (apic_read( APIC_ICR ) & APIC_ICR_BUSY)
Index: linux-2.6.19-quilt/include/asm-x86_64/desc.h
===================================================================
--- linux-2.6.19-quilt.orig/include/asm-x86_64/desc.h
+++ linux-2.6.19-quilt/include/asm-x86_64/desc.h
@@ -16,9 +16,8...
2007 Apr 18
2
[PATCH] x86_64 paravirt_ops port
...d int native_apic_read(unsigned long reg)
{
return *((volatile unsigned int *)(APIC_BASE+reg));
}
+#ifdef CONFIG_PARAVIRT
+#include <asm/paravirt.h>
+#else
+#define apic_write native_apic_write
+#define apic_read native_apic_read
+
+#endif /* CONFIG_PARAVIRT */
+
static __inline__ void apic_wait_icr_idle(void)
{
while (apic_read( APIC_ICR ) & APIC_ICR_BUSY)
Index: linux-2.6.19-quilt/include/asm-x86_64/desc.h
===================================================================
--- linux-2.6.19-quilt.orig/include/asm-x86_64/desc.h
+++ linux-2.6.19-quilt/include/asm-x86_64/desc.h
@@ -16,9 +16,8...
2007 Apr 18
8
[PATCH 0/7] x86 paravirtualization infrastructure
The following patches introduce the core infrastructure needed to
paravirtualize the 32-bit x86 Linux kernel. This is done by moving
virtualization sensitive insn's or code paths to a function table,
paravirt_ops. This structure can be populated with hypervisor specific
calls or native stubs and currently support running on bare metal, VMI,
Xen, or Lhype. These patches apply to
2007 Apr 18
8
[PATCH 0/7] x86 paravirtualization infrastructure
The following patches introduce the core infrastructure needed to
paravirtualize the 32-bit x86 Linux kernel. This is done by moving
virtualization sensitive insn's or code paths to a function table,
paravirt_ops. This structure can be populated with hypervisor specific
calls or native stubs and currently support running on bare metal, VMI,
Xen, or Lhype. These patches apply to
2008 Nov 13
69
[PATCH 00 of 38] xen: add more Xen dom0 support
Hi Ingo,
Here''s the chunk of patches to add Xen Dom0 support (it''s probably
worth creating a new xen/dom0 topic branch for it).
A dom0 Xen domain is basically the same as a normal domU domain, but
it has extra privileges to directly access hardware. There are two
issues to deal with:
- translating to and from the domain''s pseudo-physical addresses and
real machine