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...Eli From: Philip Reames <listmail at philipreames.com> Sent: Wednesday, March 25, 2020 1:34 PM To: Eric Christopher <echristo at gmail.com>; Eli Friedman <efriedma at quicinc.com> Cc: Luo, Yuanke <yuanke.luo at intel.com>; llvm-dev <llvm-dev at lists.llvm.org>; Zhang, Annita <annita.zhang at intel.com>; Craig Topper <craig.topper at intel.com> Subject: [EXT] Re: [llvm-dev] Status of Intel JCC Mitigations and Next Steps The slightly unexpected bit for me in these responses is the willingness to accept layout changes if documented. Let me lay out some opti...

I will reply those comments tomorrow. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20191204/f1111299/attachment.html>

...> -Eli > > > > *From:* llvm-dev <llvm-dev-bounces at lists.llvm.org> *On Behalf Of *Philip > Reames via llvm-dev > *Sent:* Tuesday, March 24, 2020 3:55 PM > *To:* llvm-dev <llvm-dev at lists.llvm.org> > *Cc:* Luo, Yuanke <yuanke.luo at intel.com>; Zhang, Annita < > annita.zhang at intel.com>; Craig Topper <craig.topper at intel.com> > *Subject:* [EXT] [llvm-dev] Status of Intel JCC Mitigations and Next Steps > > > > TLDR - We have a choice to make about assembler support, and a > disagreement about how to move forward. Co...

Hi Xiang, On Wed, Nov 11, 2020 at 1:59 AM Zhang, Xiang1 <xiang1.zhang at intel.com> wrote: > Jeremy wrote: > > ... The value %0 is live up to and including the ADD64ri but not past it, meaning LLVM today will drop the DBG_VALUE ... > > Just a little puzzle about the " drop the DBG_VALUE ", maybe I didn't get your key point, >

TLDR - We have a choice to make about assembler support, and a disagreement about how to move forward.  Community input needed. Background Intel has a hardware bug in Skylake and later whose mitigation requires padding of branches to avoid performance degradation. Background here: