Displaying 2 results from an estimated 2 matches for "andunlimit".
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andunlimited
2008 Oct 28
0
[LLVMdev] Targeting a platform with virtual instruction set and unlimited virtual registers
I am working on a LLVM backend for a new platform. The target has a virtual instruction set and unlimited virtual registers. After going through LLVM documentation and source code, it looks like there are two possible ways to implement it with LLVM:
1) Method #1: follow common code generator path (TableGen, LLVMTargetMachine, etc), similarly as the Sparc and x86 targets. Since the target has
2008 Oct 28
4
[LLVMdev] Using patterns inside patterns
Is there currently a way to use a pattern inside of another pattern?
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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