search for: andrm

I'm writing a back-end for a target in which all dyadic instructions support one register and one memory operand but only some instructions support two register operations. For example ADDrm and ADDrr are supported, ANDrm is supported but ANDrr isn't. I've written descriptions for ADDrm, ADDrr and ANDrm in my InstrInfo.td file but instruction selection fails when presented with an AND that has two register operands, e.g. e = (a + b) & (c + d); I guess I need to force one of the operands of the AND ope...

...ng like: def AND -> assm_op="and", insn_effect_op="and"; def OR -> assm_op"or", insn_effect_op="or"; let rm in { def OR : ...; def AND : ...; def MOV : ...; ... } The effect would be a set of instructions descriptions with names ORrm, ANDrm, MOVrm and required type of operands. Effectively, it produces the same descriptions that would be written by hand (in this regard it works pretty much as a preprocessor that expands macro definitions). The advantage is that descriptions become much shorter and cleaner, because parts common for mul...