search for: andnp

Displaying 4 results from an estimated 4 matches for "andnp".

Did you mean: andn
2010 May 11
2
[LLVMdev] How does SSEDomainFix work?
...=nehalem -debug-pass=Structure foo.bc -o foo.s (snip) Code Placement Optimizater SSE execution domain fixup Machine Natural Loop Construction X86 AT&T-Style Assembly Printer Delete Garbage Collector Information foo.s: (edited) _foo: movaps %xmm0, %xmm3 andps %xmm2, %xmm3 andnps %xmm1, %xmm2 movaps %xmm2, %xmm0 xorps %xmm3, %xmm0 ret _bar: movaps %xmm0, %xmm3 andps %xmm2, %xmm3 andnps %xmm1, %xmm2 movaps %xmm2, %xmm0 xorps %xmm3, %xmm0 ret
2010 May 11
0
[LLVMdev] How does SSEDomainFix work?
...ip) > Code Placement Optimizater > SSE execution domain fixup > Machine Natural Loop Construction > X86 AT&T-Style Assembly Printer > Delete Garbage Collector Information > > foo.s: (edited) > _foo: > movaps %xmm0, %xmm3 > andps %xmm2, %xmm3 > andnps %xmm1, %xmm2 > movaps %xmm2, %xmm0 > xorps %xmm3, %xmm0 > ret
2013 Oct 15
0
[LLVMdev] [llvm-commits] r192750 - Enable MI Sched for x86.
...%andps.i14 = add <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %bitcast6.i13 ; <<4 x i32>> [#uses=1] >> %not.i16 = xor <4 x i32> %bitcast6.i13, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] >> %andnps.i17 = add <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %not.i16 ; <<4 x i32>> [#uses=1] >> %orps.i18 = or <4 x i32> %andnps.i17, %andps.i14 ; <<4 x i32>> [#uses=1] >> %bitcast17.i19 = bitcast <4 x i32>...
2009 Apr 30
6
[LLVMdev] RFC: AVX Pattern Specification [LONG]
...s. Bug fixes in once place need to be replicated everywhere and it's easy to miss one or two. This is the very definition of "maintenance problem." Moreover, the various SSE levels were implemented at different times and do things subtly differently. For example: SSE1 : def ANDNPSrr : PSI<0x55, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), "andnps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (and (xor VR128:$src1, (b...