Displaying 6 results from an estimated 6 matches for "andc".
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2009 Jul 29
0
[LLVMdev] Vector logic regression in r73431
...==========
--- InstructionCombining.cpp (revision 77486)
+++ InstructionCombining.cpp (working copy)
@@ -1014,7 +1014,7 @@
if ((DemandedMask & (RHSKnownZero|RHSKnownOne)) == DemandedMask) {
// all known
if ((RHSKnownOne & LHSKnownOne) == RHSKnownOne) {
- Constant *AndC = ConstantInt::get(*Context,
+ Constant *AndC = ConstantInt::get(VTy,
~RHSKnownOne & DemandedMask);
Instruction *And =
BinaryOperator::CreateAnd(I->getOperand(0), AndC, "tmp");
@@ -1407,7 +1407,7 @@
// If t...
2009 Jul 29
3
[LLVMdev] Vector logic regression in r73431
Hi All,
I found a regression which triggers the asserts: "Binary operator types must
match!" and "Op types should be identical!". It's happening with a piece of
vector code, and the asserts happen because a logic operation is attempted
between a vector and a scalar (which is not present in the original code,
but created by InstCombine).
It's caused by revision
2005 Jun 01
1
R: R: R: R: R: AT-320 + supervised transfer
No...maybe i don't explain u well.
After that B call C andC not answer (go in timeout), B hear first the beeperr and then, together A the busy tone. Now i can't re-take the call :|
Thanks
Giordano
-----Messaggio originale-----
Da: asterisk-users-bounces@lists.digium.com [mailto:asterisk-users-bounces@lists.digium.com] Per conto di Gavin Hamill
Inviato...
2004 Oct 06
3
flac-1.1.1 completely broken on linux/ppc and on macosx if built with the standard toolchain (not xcode)
Sadly the latest optimization broke completely everything.
The asm code isn't gas compliant. the libFLAC linker script has a typo,
disabling the asm optimization and/or altivec won't let a correct build
anyway.
Instant fixes for the asm stuff:
sed -i -e"s:;:\#:" on the lpc_asm.s
to load address instead of addis+ori you could use
lis and la and PLEASE use the @l(register)
2004 Sep 10
1
altivec lpc_restore_signal
...through simg4, so there may be some avoidable stalls,
; and there may be a somewhat more clever way to do the outer loop
; the branch mechanism may prevent dynamic loading; I still need to examine
; this issue, and there may be a more elegant method
stmw r31,-4(r1)
addi r9,r1,-28
li r31,0xf
andc r9,r9,r31 ; for quadword-aligned stack data
slwi r6,r6,2 ; adjust for word size
slwi r4,r4,2
add r4,r4,r8 ; r4 = data+data_len
mfspr r0,256 ; cache old vrsave
addis r31,0,hi16(0xfffffc00)
ori r31,r31,lo16(0xfffffc00)
mtspr 256,r31 ; declare VRs in vrsave
cmplw cr0,r8,r4 ; i<data_len...
2005 May 30
3
R: AT-320 + supervised transfer
Hi,
Thanks for yuor answer.
The boot time of the phone is very very fast, 10 sec to startup and 2 or 3 second to login to asterisk. I set the NTP server to 255.255.255.255 so it don't try to get time.
I thinked carefully to your scenario and i am going to try it, but i don't known if it could like to my customer
I will try also to use CVS, but i am skeptic to utilize asterisk to