Displaying 3 results from an estimated 3 matches for "and32mi8".
2011 Feb 27
0
[LLVMdev] TableGen syntax for matching a constant load
On Sun, Feb 27, 2011 at 01:29:25AM +0100, Joerg Sonnenberger wrote:
> +let Predicates = [OptForSize] in {
> +def : Pat<(store (i32 0), addr:$dst), (AND32mi8 addr:$dst, 0)>;
> +def : Pat<(store (i32 0), addr:$dst), (AND32mi8 addr:$dst, 0)>;
> +def : Pat<(store (i64 -1), addr:$dst), (OR64mi8 addr:$dst, -1)>;
> +def : Pat<(store (i64 -1), addr:$dst), (OR64mi8 addr:$dst, -1)>;
> +}
All these patterns have one important dow...
2011 Feb 27
2
[LLVMdev] TableGen syntax for matching a constant load
On Sat, Feb 26, 2011 at 02:04:54PM -0800, Jakob Stoklund Olesen wrote:
>
> On Feb 26, 2011, at 1:36 PM, Joerg Sonnenberger wrote:
>
> > On Sat, Feb 26, 2011 at 01:07:39PM -0800, Jakob Stoklund Olesen wrote:
> >>
> >> You may want to consider using xorl+decl instead. It is also three
> >> bytes, and there are no false dependencies. The xor idiom is
2011 Feb 27
3
[LLVMdev] TableGen syntax for matching a constant load
On Feb 26, 2011, at 4:50 PM, Joerg Sonnenberger wrote:
> On Sun, Feb 27, 2011 at 01:29:25AM +0100, Joerg Sonnenberger wrote:
>> +let Predicates = [OptForSize] in {
>> +def : Pat<(store (i32 0), addr:$dst), (AND32mi8 addr:$dst, 0)>;
>> +def : Pat<(store (i32 0), addr:$dst), (AND32mi8 addr:$dst, 0)>;
>> +def : Pat<(store (i64 -1), addr:$dst), (OR64mi8 addr:$dst, -1)>;
>> +def : Pat<(store (i64 -1), addr:$dst), (OR64mi8 addr:$dst, -1)>;
>> +}
>
> All these patte...