search for: an32quads

...provide the MIR before and after dead-mi-elimination? Just > the part where %5 is involved should suffice. Thanks. So this is what it looks like before register coalescing (bb.3 dominates bb.1): bb.1: ... %22:an32_0_7 = COPY killed %5.hiPair_then_loAcc ... bb.3: ... %5:an32quads = COPY killed %13 %5.hiPair_then_hiAcc:an32quads = COPY undef %11 ... After register coalescing and until dead-mi-elimination, it looks like this: bb.0: ... undef %5.hiPair_then_loAcc:an32quads = COPY %12 ... bb.1: ... %5.hiPair_then_loAcc:an32quads = or_a40_a40_...

Hi, After dead-mi-elimination I'm experiencing a machine verifier failure at this virtual subregister write: %5.sub1 = COPY undef %11 The machine verifier essentially complains that the rest of the register is undefined (a subregister write implies a "read" of the other parts). So the problem is that dead-mi-elimination has removed the previously existing defines of %5.sub0.