Displaying 9 results from an estimated 9 matches for "amdilintrinsic".
2012 Nov 30
3
[LLVMdev] Tablegen bug???
...on name -> enum value recognizer code.
#ifdef GET_FUNCTION_RECOGNIZER
StringRef NameR(Name+6, Len-6); // Skip over 'llvm.'
switch (Name[5]) { // Dispatch on first letter.
default: break;
case 'A':
…
if (NameR.startswith("MDIL.barrier.")) return AMDILIntrinsic::AMDIL_barrier;
if (NameR.startswith("MDIL.barrier.global.")) return AMDILIntrinsic::AMDIL_barrier_global;
if (NameR.startswith("MDIL.barrier.local.")) return AMDILIntrinsic::AMDIL_barrier_local;
if (NameR.startswith("MDIL.barrier.region.")) return AMDILIntrin...
2012 Nov 30
2
[LLVMdev] Tablegen bug???
...GET_FUNCTION_RECOGNIZER
>> StringRef NameR(Name+6, Len-6); // Skip over 'llvm.'
>> switch (Name[5]) { // Dispatch on first letter.
>> default: break;
>> case 'A':
>> …
>> if (NameR.startswith("MDIL.barrier.")) return AMDILIntrinsic::AMDIL_barrier;
>> if (NameR.startswith("MDIL.barrier.global.")) return AMDILIntrinsic::AMDIL_barrier_global;
>> if (NameR.startswith("MDIL.barrier.local.")) return AMDILIntrinsic::AMDIL_barrier_local;
>> if (NameR.startswith("MDIL.barrier.region."...
2012 Nov 30
0
[LLVMdev] Tablegen bug???
...nizer code.
> #ifdef GET_FUNCTION_RECOGNIZER
> StringRef NameR(Name+6, Len-6); // Skip over 'llvm.'
> switch (Name[5]) { // Dispatch on first letter.
> default: break;
> case 'A':
> …
> if (NameR.startswith("MDIL.barrier.")) return AMDILIntrinsic::AMDIL_barrier;
> if (NameR.startswith("MDIL.barrier.global.")) return AMDILIntrinsic::AMDIL_barrier_global;
> if (NameR.startswith("MDIL.barrier.local.")) return AMDILIntrinsic::AMDIL_barrier_local;
> if (NameR.startswith("MDIL.barrier.region.")) return...
2013 Jul 03
0
[LLVMdev] Tablegen bug???
...(Name+6, Len-6); // Skip over 'llvm.'
> >>> switch (Name[5]) { // Dispatch on first letter.
> >>> default: break;
> >>> case 'A':
> >>> …
> >>> if (NameR.startswith("MDIL.barrier.")) return
> AMDILIntrinsic::AMDIL_barrier;
> >>> if (NameR.startswith("MDIL.barrier.global.")) return
> AMDILIntrinsic::AMDIL_barrier_global;
> >>> if (NameR.startswith("MDIL.barrier.local.")) return
> AMDILIntrinsic::AMDIL_barrier_local;
> >>> if (NameR.startswit...
2012 Dec 01
0
[LLVMdev] Tablegen bug???
...R
>>> StringRef NameR(Name+6, Len-6); // Skip over 'llvm.'
>>> switch (Name[5]) { // Dispatch on first letter.
>>> default: break;
>>> case 'A':
>>> …
>>> if (NameR.startswith("MDIL.barrier.")) return AMDILIntrinsic::AMDIL_barrier;
>>> if (NameR.startswith("MDIL.barrier.global.")) return AMDILIntrinsic::AMDIL_barrier_global;
>>> if (NameR.startswith("MDIL.barrier.local.")) return AMDILIntrinsic::AMDIL_barrier_local;
>>> if (NameR.startswith("MDIL.barrier.regi...
2010 Nov 08
2
[LLVMdev] Creating tablegen patterns for intrinsics with no return value.
...Pattern:
def ATOM_G_ADD_NORET : BinAtomNoRet<IL_OP_UAV_ADD,
"_id($id)", atom_g_add_noret>;
I am Lowering INTRINSIC_W_CHAIN to lower from @llvm.amdil.atomic.add.gi32.noret to the correct instruction with the following code sequence.
LowerINTRINSIC_W_CHAIN(...)
{
...
case AMDILIntrinsic::AMDIL_atomic_add_gu32_noret:
IntNo = AMDILISD::ATOM_G_ADD_NORET; break;
...
SDValue Ops[6];
SDValue chain = Op.getOperand(0);
unsigned numNodes = 0;
if (inChain) {
Ops[numNodes++] = chain;
}
SDValue Chain = Op.getOperand(0);
Ops[numNodes++] = Op.getOperand((inChain)...
2010 Nov 08
0
[LLVMdev] Creating tablegen patterns for intrinsics with no return value.
...oRet<IL_OP_UAV_ADD,
> "_id($id)", atom_g_add_noret>;
>
>
> I am Lowering INTRINSIC_W_CHAIN to lower from @llvm.amdil.atomic.add.gi32.noret to the correct instruction with the following code sequence.
>
> LowerINTRINSIC_W_CHAIN(…)
> {
> …
> case AMDILIntrinsic::AMDIL_atomic_add_gu32_noret:
> IntNo = AMDILISD::ATOM_G_ADD_NORET; break;
> …
> SDValue Ops[6];
> SDValue chain = Op.getOperand(0);
> unsigned numNodes = 0;
> if (inChain) {
> Ops[numNodes++] = chain;
> }
> SDValue Chain = Op.getOperand(0);
&...
2010 Nov 08
1
[LLVMdev] Creating tablegen patterns for intrinsics with no return value.
...", atom_g_add_noret>;
> >
> >
> > I am Lowering INTRINSIC_W_CHAIN to lower from
> @llvm.amdil.atomic.add.gi32.noret to the correct instruction with the
> following code sequence.
> >
> > LowerINTRINSIC_W_CHAIN(...)
> > {
> > ...
> > case AMDILIntrinsic::AMDIL_atomic_add_gu32_noret:
> > IntNo = AMDILISD::ATOM_G_ADD_NORET; break;
> > ...
> > SDValue Ops[6];
> > SDValue chain = Op.getOperand(0);
> > unsigned numNodes = 0;
> > if (inChain) {
> > Ops[numNodes++] = chain;
> > }...
2012 Jul 16
3
[LLVMdev] RFC: LLVM incubation, or requirements for committing new backends
.../Target/AMDGPU/AMDILISelLowering.h
> llvm/trunk/lib/Target/AMDGPU/AMDILInstrInfo.cpp
> llvm/trunk/lib/Target/AMDGPU/AMDILInstrInfo.h
> llvm/trunk/lib/Target/AMDGPU/AMDILInstrInfo.td
> llvm/trunk/lib/Target/AMDGPU/AMDILInstructions.td
> llvm/trunk/lib/Target/AMDGPU/AMDILIntrinsicInfo.cpp
> llvm/trunk/lib/Target/AMDGPU/AMDILIntrinsicInfo.h
> llvm/trunk/lib/Target/AMDGPU/AMDILIntrinsics.td
> llvm/trunk/lib/Target/AMDGPU/AMDILMultiClass.td
> llvm/trunk/lib/Target/AMDGPU/AMDILNIDevice.cpp
> llvm/trunk/lib/Target/AMDGPU/AMDILNIDevice.h
>...