Displaying 3 results from an estimated 3 matches for "amdil_atomic_add_gu32_noret".
2010 Nov 08
2
[LLVMdev] Creating tablegen patterns for intrinsics with no return value.
...M_G_ADD_NORET : BinAtomNoRet<IL_OP_UAV_ADD,
"_id($id)", atom_g_add_noret>;
I am Lowering INTRINSIC_W_CHAIN to lower from @llvm.amdil.atomic.add.gi32.noret to the correct instruction with the following code sequence.
LowerINTRINSIC_W_CHAIN(...)
{
...
case AMDILIntrinsic::AMDIL_atomic_add_gu32_noret:
IntNo = AMDILISD::ATOM_G_ADD_NORET; break;
...
SDValue Ops[6];
SDValue chain = Op.getOperand(0);
unsigned numNodes = 0;
if (inChain) {
Ops[numNodes++] = chain;
}
SDValue Chain = Op.getOperand(0);
Ops[numNodes++] = Op.getOperand((inChain) ? 2 : 1);
Ops[numNodes++] =...
2010 Nov 08
0
[LLVMdev] Creating tablegen patterns for intrinsics with no return value.
...V_ADD,
> "_id($id)", atom_g_add_noret>;
>
>
> I am Lowering INTRINSIC_W_CHAIN to lower from @llvm.amdil.atomic.add.gi32.noret to the correct instruction with the following code sequence.
>
> LowerINTRINSIC_W_CHAIN(…)
> {
> …
> case AMDILIntrinsic::AMDIL_atomic_add_gu32_noret:
> IntNo = AMDILISD::ATOM_G_ADD_NORET; break;
> …
> SDValue Ops[6];
> SDValue chain = Op.getOperand(0);
> unsigned numNodes = 0;
> if (inChain) {
> Ops[numNodes++] = chain;
> }
> SDValue Chain = Op.getOperand(0);
> Ops[numNodes++] = Op.ge...
2010 Nov 08
1
[LLVMdev] Creating tablegen patterns for intrinsics with no return value.
...dd_noret>;
> >
> >
> > I am Lowering INTRINSIC_W_CHAIN to lower from
> @llvm.amdil.atomic.add.gi32.noret to the correct instruction with the
> following code sequence.
> >
> > LowerINTRINSIC_W_CHAIN(...)
> > {
> > ...
> > case AMDILIntrinsic::AMDIL_atomic_add_gu32_noret:
> > IntNo = AMDILISD::ATOM_G_ADD_NORET; break;
> > ...
> > SDValue Ops[6];
> > SDValue chain = Op.getOperand(0);
> > unsigned numNodes = 0;
> > if (inChain) {
> > Ops[numNodes++] = chain;
> > }
> > SDValue Chain = O...