search for: amdgpuasmparser

Dear Developers, I compile a OpenCL kernel, FFT, in AMDAPP SDK v2.5 using clang 3.8 + libclc and assembling the code with lld (The LLVM linker). The assembly code contains the following assembly codes (and lots of other similar format assembly) that fails to be parsed by AMDGPUAsmParser. It seems to me that both are valid instructions after looking at the SI instruction spec. s_mov_b32 s0, 0xfe5163ab v_mad_f32 v9, 0.5, v5, -v8 To reproduce this, I write this two lines in a text file and run llvm-mc -arch=amdgcn -mcpu=kaveri input.s The first line has the following error messag...

...gt; > I’ve fixed this problem in r251132. > Thanks for the reply and the quick fix of negative 32-bit immediate. > > > > The second line of the assembly has the assertion fail: > > > > llvm-mc: > /mnt/dm-0/codebase/Compilers/LLVM/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp:184: > void (anonymous namespace)::AMDGPUOperand::setModifiers(unsigned int): > Assertion `isReg()' failed. > > > > and reports that 0.5 is "error: invalid operand for instruction" > > > > v_mad_f32 v9, 0.5, v5, -v8 > > There is a bug with opera...