Displaying 3 results from an estimated 3 matches for "amd_iommu_reserve_domain_unity_map".
2011 Jan 27
1
[PATCH 2/3] amd iommu: Clean up amd_iommu_reserve_domain_unity_map
Signed-off-by: Wei Wang <wei.wang2@amd.com>
--
Advanced Micro Devices GmbH
Sitz: Dornach, Gemeinde Aschheim,
Landkreis München Registergericht München,
HRB Nr. 43632
WEEE-Reg-Nr: DE 12919551
Geschäftsführer:
Alberto Bozzo, Andrew Bowd
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2009 Jan 30
0
[PATCH 2/2] amd-iommu: drop locks before printing error messages
...== 0 )
{
- amd_iov_error("Invalid IO pagetable entry gfn = %lx\n", gfn);
spin_unlock_irqrestore(&hd->mapping_lock, flags);
+ amd_iov_error("Invalid IO pagetable entry gfn = %lx\n", gfn);
return -EFAULT;
}
@@ -533,9 +533,9 @@ int amd_iommu_reserve_domain_unity_map(
if ( iommu_l2e == 0 )
{
- amd_iov_error(
- "Invalid IO pagetable entry phys_addr = %lx\n", phys_addr);
spin_unlock_irqrestore(&hd->mapping_lock, flags);
+ amd_iov_error("Invalid IO pagetable entry phys_addr = %...
2011 Nov 18
5
[PATCH 0 of 4] amd iommu: IOMMUv2 support
This patch set adds basic supports for amd next generation iommu (IOMMUv2)
hardware. IOMMUv2 supports various new features advertised by iommu
extended feature register. It introduces guest level IO translation and
supports state-of-the-art ATS/ATC devices with demand paging capability.
Please refer to AMD IOMMU Architectural Specification [1] for more details.
Thanks,
Wei
[1]