Displaying 9 results from an estimated 9 matches for "amd8131".
2005 Jul 01
0
Good, concurrent I/O design in a server -- WAS: SPARC platforms
...n the other hand, while not ideal, will have much lesser effect
on your performance."
This is very much an issue. If I have an OS that has processor
affinity for I/O, like Solaris, on a partial mesh platform like most
SPARCs (non-"i" versions), or the newer Opteron (with multiple
AMD8131/8132 or even the nVidia Pro 2200+2050 combo), then
I'm going to be able to handle _concurrent_ I/O for independent
(and sometimes even inter-dependent) processors.
You think of "raw throughput" like 8.4GBps FSB can easily handle
a 0.5GBps transfer, but what you don't realize that...
2005 Jun 22
11
Opteron Mobo Suggestions
I've been planning to build a dual Opteron server for awhile. I'd like
to get people's suggestions on a suitable motherboard.
I've looked at the Tyan K8SE (S2892) and K8SRE (S2891) but would like to
find more Linux-specific experiences with these boards.
Some features I expect are at least 4 SATA (SATA-300?) ports, serial
console support in the BIOS, USB 2.0 and IEEE-1394
2005 Nov 21
2
[Hardware] Good Server I/O on-the-cheap: ASL Monarch 811x with CentOS 4.2 ...
...rWorks HT1000 chipset:
http://www.broadcom.com/products/Enterprise-Small-Office/SystemI-O-Chips/HT-1000
The ServerWorks HT1000 is rarely found without the HT2000, hence why you
typically only find them in dual or quad socket boxen. And that
combination competes against serverboards with the AMD8131/8132, which
are also typically only found in dual or quad socket boxen. The number
of channels, traces, etc... is why it's never cost-effective to make a
single processor with an AMD8131. But in the case of the single chip
HT1000 on its own -- with dual-GbE NICs and a single PCI-X channel,
pl...
2005 Jun 27
2
What do you think about this motherboard?
Hello all..... I would like to know if anyone here has had good
experience with this Supermicro
motherboard.....http://supermicro.com/products/motherboard/P4/E7221/P8SCT.cfm
I am thinking about using it in an entry level mail and file server
with a 3ware card and 200 GB SATA drives. Cost is a factor here
otherwise I would go for an Opteron board instead.
JC
2010 Nov 09
4
Xen 3.4.3and CentOS PCIback
...g
- Added public key 5E4A078C196151F
- User ID: CentOS (Kernel Module GPG key)
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered (default)
PCI: MSI quirk detected. PCI_BUS_FLAGS_NO_MSI set for 0000:00:0a.0
subordinate bus.
AMD8131 rev 12 detected, disabling PCI-X MMRBC
PCI: MSI quirk detected. PCI_BUS_FLAGS_NO_MSI set for subordinate bus.
PCI: MSI quirk detected. PCI_BUS_FLAGS_NO_MSI set for 0000:00:0b.0
subordinate bus.
AMD8131 rev 12 detected, disabling PCI-X MMRBC
PCI: MSI quirk detected. PCI_BUS_FLAGS_NO_MSI set for subo...
2010 Nov 09
4
Xen 3.4.3and CentOS PCIback
...g
- Added public key 5E4A078C196151F
- User ID: CentOS (Kernel Module GPG key)
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered (default)
PCI: MSI quirk detected. PCI_BUS_FLAGS_NO_MSI set for 0000:00:0a.0
subordinate bus.
AMD8131 rev 12 detected, disabling PCI-X MMRBC
PCI: MSI quirk detected. PCI_BUS_FLAGS_NO_MSI set for subordinate bus.
PCI: MSI quirk detected. PCI_BUS_FLAGS_NO_MSI set for 0000:00:0b.0
subordinate bus.
AMD8131 rev 12 detected, disabling PCI-X MMRBC
PCI: MSI quirk detected. PCI_BUS_FLAGS_NO_MSI set for subo...
2005 Apr 15
16
Serial ATA hardware raid.
Hi everyone,
I'm looking into setting up a SATA hardware raid, probably 5 to use with
CentOS 4. I chose hardware raid over software mostly because I like the
fact that the raid is transparent to the OS.
Does anyone know of any SATA controllers that are well tested for this
sort of usage?
From what I can tell from googling, this is more or less where RHEL stands:
Red Hat Enterprise Linux
2012 Nov 19
0
[PATCH 242/493] pci: remove use of __devinit
...hanges.
* See AMD 8131 HyperTransport PCI-X Tunnel Revision Guide
*/
-static void __devinit quirk_amd_8131_mmrbc(struct pci_dev *dev)
+static void quirk_amd_8131_mmrbc(struct pci_dev *dev)
{
if (dev->subordinate && dev->revision <= 0x12) {
dev_info(&dev->dev, "AMD8131 rev %x detected; "
@@ -819,7 +819,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_
* value of the ACPI SCI interrupt is only done for convenience.
* -jgarzik
*/
-static void __devinit quirk_via_acpi(struct pci_dev *d)
+static void quirk_via_acpi(struc...
2012 Nov 19
0
[PATCH 242/493] pci: remove use of __devinit
...hanges.
* See AMD 8131 HyperTransport PCI-X Tunnel Revision Guide
*/
-static void __devinit quirk_amd_8131_mmrbc(struct pci_dev *dev)
+static void quirk_amd_8131_mmrbc(struct pci_dev *dev)
{
if (dev->subordinate && dev->revision <= 0x12) {
dev_info(&dev->dev, "AMD8131 rev %x detected; "
@@ -819,7 +819,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_
* value of the ACPI SCI interrupt is only done for convenience.
* -jgarzik
*/
-static void __devinit quirk_via_acpi(struct pci_dev *d)
+static void quirk_via_acpi(struc...