search for: alphaiseldagtodag

...e virtual regs for them > and pre-assign physical regs somehow? > > Or my be I have to define a new calling convention that would enforce > it? The Alpha backend does this for division and remainder of integers. See AlphaISelLowering.cpp:501 for the lowering to a custom call node, then AlphaISelDAGToDAG.cpp:215 for the enforcing of the register constraints (copy into/out of physical registers), then AlphaInsrInfo.td:476 (JSRs) for the call instruction with special register DEF/USE sets to match the calling convention of the library function. Hope that helps. Andrew

In ARM, constants that are too large to be used as immediate are usually placed in a constant pool and loaded. What I am trying to do is to have a select function that checks the if a constant can be an immediate and, if it can't, produces a load: --------------------------------------------------------------------------------------- const Type *OpNTy =

Hi, >> My target supports only f64 at the moment. >> Question: How can I tell LLVM that float is the same as double on my >> target? May be by assigning the same register class to both MVT::f32 ?> and MVT::f64? >Just don't assign a register class for the f32 type. This is what the >X86 backend does when it is in "floating point stack mode". This will