search for: alphainsrinfo

...convention that would enforce > it? The Alpha backend does this for division and remainder of integers. See AlphaISelLowering.cpp:501 for the lowering to a custom call node, then AlphaISelDAGToDAG.cpp:215 for the enforcing of the register constraints (copy into/out of physical registers), then AlphaInsrInfo.td:476 (JSRs) for the call instruction with special register DEF/USE sets to match the calling convention of the library function. Hope that helps. Andrew

Hi, >> My target supports only f64 at the moment. >> Question: How can I tell LLVM that float is the same as double on my >> target? May be by assigning the same register class to both MVT::f32 ?> and MVT::f64? >Just don't assign a register class for the f32 type. This is what the >X86 backend does when it is in "floating point stack mode". This will