Displaying 16 results from an estimated 16 matches for "alloc_large_system_hash".
2008 Oct 27
5
xen 3.3.0 + intrepid domU (2.6.27-7-server) + >4gb ram problem
...fff8020b293>] xen_alloc_pte+0x13/0x20
[ 0.010000] [<ffffffff802bef21>] __pte_alloc_kernel+0x61/0xc0
[ 0.010000] [<ffffffff802cbdf4>] map_vm_area+0x2d4/0x350
[ 0.010000] [<ffffffff802cc5f0>] __vmalloc_area_node+0x140/0x1a0
[ 0.010000] [<ffffffff80740856>] ? alloc_large_system_hash+0x24c/0x2b0
[ 0.010000] [<ffffffff802cc6f1>] __vmalloc_node+0xa1/0xb0
[ 0.010000] [<ffffffff80740856>] ? alloc_large_system_hash+0x24c/0x2b0
[ 0.010000] [<ffffffff80740856>] ? alloc_large_system_hash+0x24c/0x2b0
[ 0.010000] [<ffffffff802cc511>] __vmalloc_area...
2009 Sep 09
4
Dmesg log for 2.6.31-rc8 kernel been built on F12 (rawhide) vs log for same kernel been built on F11 and installed on F12
Previous 2.6.31-rc8 kernel was built on F11 and installed with modules on F12.
Current kernel has been built on F12 (2.6.31-0.204.rc9.fc12.x86_64) and installed
on F12 before loading under Xen 3.4.1.
Dmesg log looks similar to Michael Yuong''s ''rc7.git4'' kernel for F12.
Boris.
--- On Tue, 9/8/09, Boris Derzhavets <bderzhavets@yahoo.com> wrote:
From: Boris
2015 Apr 13
1
[PATCH v15 09/15] pvqspinlock: Implement simple paravirt support for the qspinlock
...v_hash_size< (1U<< LFSR_MIN_BITS))
> >>+ pv_hash_size = (1U<< LFSR_MIN_BITS);
> >>+ /*
> >>+ * Allocate space from bootmem which should be page-size aligned
> >>+ * and hence cacheline aligned.
> >>+ */
> >>+ pv_lock_hash = alloc_large_system_hash("PV qspinlock",
> >>+ sizeof(struct pv_hash_bucket),
> >>+ pv_hash_size, 0, HASH_EARLY,
> >>+ &pv_lock_hash_bits, NULL,
> >>+ pv_hash_size, pv_hash_size);
> > pv_taps = lfsr_taps(pv_lock_hash_bits);
> &g...
2015 Apr 13
1
[PATCH v15 09/15] pvqspinlock: Implement simple paravirt support for the qspinlock
...v_hash_size< (1U<< LFSR_MIN_BITS))
> >>+ pv_hash_size = (1U<< LFSR_MIN_BITS);
> >>+ /*
> >>+ * Allocate space from bootmem which should be page-size aligned
> >>+ * and hence cacheline aligned.
> >>+ */
> >>+ pv_lock_hash = alloc_large_system_hash("PV qspinlock",
> >>+ sizeof(struct pv_hash_bucket),
> >>+ pv_hash_size, 0, HASH_EARLY,
> >>+ &pv_lock_hash_bits, NULL,
> >>+ pv_hash_size, pv_hash_size);
> > pv_taps = lfsr_taps(pv_lock_hash_bits);
> &g...
2013 Jun 17
1
Kernel panic in pin_pagetable_pfn
...0000000
[ 0.004000] Call Trace:
[ 0.004000] [<ffffffff8028d372>] ? __pte_alloc_kernel+0x82/0xb0
[ 0.004000] [<ffffffff802976a9>] ? map_vm_area+0x309/0x340
[ 0.004000] [<ffffffff80297db8>] ? __vmalloc_area_node+0x118/0x170
[ 0.004000] [<ffffffff80874bd0>] ? alloc_large_system_hash+0x1f0/0x2c0
[ 0.004000] [<ffffffff80297cf9>] ? __vmalloc_area_node+0x59/0x170
[ 0.004000] [<ffffffff80874bd0>] ? alloc_large_system_hash+0x1f0/0x2c0
[ 0.004000] [<ffffffff8087619d>] ? vfs_caches_init+0x10d/0x160
[ 0.004000] [<ffffffff80856d31>] ? start_kernel...
2015 Apr 09
6
[PATCH v15 09/15] pvqspinlock: Implement simple paravirt support for the qspinlock
...e = 4 * num_possible_cpus();
> +
> + if (pv_hash_size < (1U << LFSR_MIN_BITS))
> + pv_hash_size = (1U << LFSR_MIN_BITS);
> + /*
> + * Allocate space from bootmem which should be page-size aligned
> + * and hence cacheline aligned.
> + */
> + pv_lock_hash = alloc_large_system_hash("PV qspinlock",
> + sizeof(struct pv_hash_bucket),
> + pv_hash_size, 0, HASH_EARLY,
> + &pv_lock_hash_bits, NULL,
> + pv_hash_size, pv_hash_size);
pv_taps = lfsr_taps(pv_lock_hash_bits);
> +}
> +
> +static inline u32...
2015 Apr 09
6
[PATCH v15 09/15] pvqspinlock: Implement simple paravirt support for the qspinlock
...e = 4 * num_possible_cpus();
> +
> + if (pv_hash_size < (1U << LFSR_MIN_BITS))
> + pv_hash_size = (1U << LFSR_MIN_BITS);
> + /*
> + * Allocate space from bootmem which should be page-size aligned
> + * and hence cacheline aligned.
> + */
> + pv_lock_hash = alloc_large_system_hash("PV qspinlock",
> + sizeof(struct pv_hash_bucket),
> + pv_hash_size, 0, HASH_EARLY,
> + &pv_lock_hash_bits, NULL,
> + pv_hash_size, pv_hash_size);
pv_taps = lfsr_taps(pv_lock_hash_bits);
> +}
> +
> +static inline u32...
2015 Apr 09
0
[PATCH v15 09/15] pvqspinlock: Implement simple paravirt support for the qspinlock
...;> +
>> + if (pv_hash_size< (1U<< LFSR_MIN_BITS))
>> + pv_hash_size = (1U<< LFSR_MIN_BITS);
>> + /*
>> + * Allocate space from bootmem which should be page-size aligned
>> + * and hence cacheline aligned.
>> + */
>> + pv_lock_hash = alloc_large_system_hash("PV qspinlock",
>> + sizeof(struct pv_hash_bucket),
>> + pv_hash_size, 0, HASH_EARLY,
>> + &pv_lock_hash_bits, NULL,
>> + pv_hash_size, pv_hash_size);
> pv_taps = lfsr_taps(pv_lock_hash_bits);
>
I don't understan...
2015 Apr 07
0
[PATCH v15 09/15] pvqspinlock: Implement simple paravirt support for the qspinlock
...nit_lock_hash(void)
+{
+ int pv_hash_size = 4 * num_possible_cpus();
+
+ if (pv_hash_size < (1U << LFSR_MIN_BITS))
+ pv_hash_size = (1U << LFSR_MIN_BITS);
+ /*
+ * Allocate space from bootmem which should be page-size aligned
+ * and hence cacheline aligned.
+ */
+ pv_lock_hash = alloc_large_system_hash("PV qspinlock",
+ sizeof(struct pv_hash_bucket),
+ pv_hash_size, 0, HASH_EARLY,
+ &pv_lock_hash_bits, NULL,
+ pv_hash_size, pv_hash_size);
+}
+
+static inline u32 hash_align(u32 hash)
+{
+ return hash & ~(PV_HB_PER_LINE - 1);
+}
+
+stati...
2015 Apr 24
0
[PATCH v16 08/14] pvqspinlock: Implement simple paravirt support for the qspinlock
...+void __init __pv_init_lock_hash(void)
+{
+ int pv_hash_size = 4 * num_possible_cpus() / PV_HE_PER_LINE;
+
+ if (pv_hash_size < PV_HB_MIN)
+ pv_hash_size = PV_HB_MIN;
+ /*
+ * Allocate space from bootmem which should be page-size aligned
+ * and hence cacheline aligned.
+ */
+ pv_lock_hash = alloc_large_system_hash("PV qspinlock",
+ sizeof(struct pv_hash_bucket),
+ pv_hash_size, 0, HASH_EARLY,
+ &pv_lock_hash_bits, NULL,
+ pv_hash_size, pv_hash_size);
+}
+
+static inline struct qspinlock **
+pv_hash(struct qspinlock *lock, struct pv_node *node)
+{
+ un...
2015 May 04
1
[PATCH v16 08/14] pvqspinlock: Implement simple paravirt support for the qspinlock
...init __pv_init_lock_hash(void)
+{
+ int pv_hash_size = ALIGN(4 * num_possible_cpus(), PV_HE_PER_LINE);
+
+ if (pv_hash_size < PV_HE_MIN)
+ pv_hash_size = PV_HE_MIN;
+
+ /*
+ * Allocate space from bootmem which should be page-size aligned
+ * and hence cacheline aligned.
+ */
+ pv_lock_hash = alloc_large_system_hash("PV qspinlock",
+ sizeof(struct pv_hash_entry),
+ pv_hash_size, 0, HASH_EARLY,
+ &pv_lock_hash_bits, NULL,
+ pv_hash_size, pv_hash_size);
+}
+
+#define for_each_hash_entry(he, offset, hash) \
+ for (hash &= ~(PV_HE_PER_LINE - 1), he...
2015 May 04
1
[PATCH v16 08/14] pvqspinlock: Implement simple paravirt support for the qspinlock
...init __pv_init_lock_hash(void)
+{
+ int pv_hash_size = ALIGN(4 * num_possible_cpus(), PV_HE_PER_LINE);
+
+ if (pv_hash_size < PV_HE_MIN)
+ pv_hash_size = PV_HE_MIN;
+
+ /*
+ * Allocate space from bootmem which should be page-size aligned
+ * and hence cacheline aligned.
+ */
+ pv_lock_hash = alloc_large_system_hash("PV qspinlock",
+ sizeof(struct pv_hash_entry),
+ pv_hash_size, 0, HASH_EARLY,
+ &pv_lock_hash_bits, NULL,
+ pv_hash_size, pv_hash_size);
+}
+
+#define for_each_hash_entry(he, offset, hash) \
+ for (hash &= ~(PV_HE_PER_LINE - 1), he...
2015 Apr 07
18
[PATCH v15 00/15] qspinlock: a 4-byte queue spinlock with PV support
v14->v15:
- Incorporate PeterZ's v15 qspinlock patch and improve upon the PV
qspinlock code by dynamically allocating the hash table as well
as some other performance optimization.
- Simplified the Xen PV qspinlock code as suggested by David Vrabel
<david.vrabel at citrix.com>.
- Add benchmarking data for 3.19 kernel to compare the performance
of a spinlock heavy test
2015 Apr 07
18
[PATCH v15 00/15] qspinlock: a 4-byte queue spinlock with PV support
v14->v15:
- Incorporate PeterZ's v15 qspinlock patch and improve upon the PV
qspinlock code by dynamically allocating the hash table as well
as some other performance optimization.
- Simplified the Xen PV qspinlock code as suggested by David Vrabel
<david.vrabel at citrix.com>.
- Add benchmarking data for 3.19 kernel to compare the performance
of a spinlock heavy test
2015 Apr 24
16
[PATCH v16 00/14] qspinlock: a 4-byte queue spinlock with PV support
v15->v16:
- Remove the lfsr patch and use linear probing as lfsr is not really
necessary in most cases.
- Move the paravirt PV_CALLEE_SAVE_REGS_THUNK code to an asm header.
- Add a patch to collect PV qspinlock statistics which also
supersedes the PV lock hash debug patch.
- Add PV qspinlock performance numbers.
v14->v15:
- Incorporate PeterZ's v15 qspinlock patch and improve
2015 Apr 24
16
[PATCH v16 00/14] qspinlock: a 4-byte queue spinlock with PV support
v15->v16:
- Remove the lfsr patch and use linear probing as lfsr is not really
necessary in most cases.
- Move the paravirt PV_CALLEE_SAVE_REGS_THUNK code to an asm header.
- Add a patch to collect PV qspinlock statistics which also
supersedes the PV lock hash debug patch.
- Add PV qspinlock performance numbers.
v14->v15:
- Incorporate PeterZ's v15 qspinlock patch and improve