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I maintain and develop an AVR backend for LLVM on GitHub <https://github.com/avr-llvm/llvm>. It has now progressed quite far, with the ability to compile most non-trivial programs unmodified (for example, the Arduino <https://www.arduino.cc/> suite. It has complete machine code/ELF support, also implementing the entire instruction set (as of 2015), and a functionally-complete assembly

...!! > On Sep 29, 2015, at 17:03 , Hal Finkel via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > ----- Original Message ----- >> From: "Dylan McKay via llvm-dev" <llvm-dev at lists.llvm.org> >> To: llvm-dev at lists.llvm.org, "David Siegel" <agnat at me.com> >> Sent: Thursday, September 3, 2015 10:35:16 PM >> Subject: [llvm-dev] Integration of AVR backend >> >> I maintain and develop an AVR backend for LLVM on GitHub . It has now >> progressed quite far, with the ability to compile most non-trivial >>...

Hello, Most of the IR language is correctly explained; but with inline assembly I feel alone at some point: define i32 @main(i32 %argc, i8** %argv) #0 { ... //some uninteresting bloat here call void asm sideeffect "outw %eax, $0", "imr,~{dirflag},~{fpsr},~{flags}"(i32 %8) #2, !srcloc !2 ret i32 0 } I reduced the above code to the offending line containing:

Thanks, but I could not find the imr, dirflag, fpsr constraints here. Just the usual gcc/clang inline assembly constraints. Those one were of my concern, actually :) --  Alex 18.11.2015, 17:11, "David Siegel" <agnat at icloud.com>: >>  On 18.11.2015, at 16:28, AlexandreFressange via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >>  I reduced the above code to the offending line containing: "imr,~{dirflag},~{fpsr},~{flags}". >> >>  How should I interpret this?...