search for: aggressiveinstcombine

...s://pastebin.com/2zFU7J6g (interesting things happened at line 67) If, like me, you don't have a GFNI-enabled CPU, you can use Intel SDE [4] to run the compiled code. The code of the pass is available here: https://github.com/aguinet/llvm-project/blob/feature/gfni_combine/llvm/lib/Transforms/AggressiveInstCombine/AffineExprCombine.cpp And there are test cases here: https://github.com/aguinet/llvm-project/tree/feature/gfni_combine/llvm/test/Transforms/AggressiveInstCombine (aec_*.ll) Questions ========= The high-level view of the algorithm is the following: a) gather, from a basic block, suites of instru...

On 5/18/20 8:24 PM, Craig Topper wrote: > I can tell you that your avx512 issue is that v64i8 gfni instructions also > require avx512bw to be enabled to make v64i8 a supported type. The C > intrinsics handling in the front end know this rule. But since you > generated your own intrinsics you bypassed that. Indeed that's the issue... I was stick with what Intel announces here

...h new PIM instructions. However, if there's a better tool, or if LLVM is just purely the wrong tool, please tell me. 2. Is there a standard way to do this sort of "pattern matching" in LLVM, e.g. finding load-load-op-store patterns? I found the InstCombinePass class and AggressiveInstCombine directory, which seems to be very close to what I need. I even see mention of "pattern matching" in these files. However, I'm confused as to whether there is a standard way to write patterns and replacements (e.g. specifying that load-load-op-store gets replaced with cache...

...; Error:"<<errStr<<"\n"; delete ee; errs() << "Hello: "; errs().write_escaped(F.getName()) << '\n'; return false; } ``` Modified opt's CMakeLists.txt: ``` set(LLVM_LINK_COMPONENTS ${LLVM_TARGETS_TO_BUILD} AggressiveInstCombine Analysis BitWriter CodeGen Core MC MCJIT Object OrcJIT Interpreter RuntimeDyld Coroutines IPO IRReader InstCombine Instrumentation MC ObjCARCOpts ScalarOpts Support Target TransformUtils Vectorize Passes ExecutionEngine ) # Support plugins. set(LLV...

Hey: I spent sometime debugging this, it seems like editing ``llvm/tools/opt.cpp`` and move ``cl::ParseCommandLineOptions(argc, argv, "llvm .bc -> .bc modular optimizer and analysis printer\n");`` to the beginning of main() solved it for me. I'm not sure if this is a bug on LLVM side Zhang ------------------ Original ------------------ From: "Viktor Was BSc via

...s.llvm.org/rL323155). * New documentation has been added on adding exception handling support for a target. [r323311](http://reviews.llvm.org/rL323311). * A new utility has been written which uses bugpoint to reduce failures in GlobalISel tests. [r323248](http://reviews.llvm.org/rL323248). * The AggressiveInstCombine pass has been introduced. This differs from InstCombine in that it can contain optimisations with greater than O(1) complexity. [r323321](http://reviews.llvm.org/rL323321). * A series of refactoring patches have enabled false dependencies for X86 POPCNT, LZCN and TZCNT to be broken. [r323096](http...

_mulx_u64 only exists when the target is x86_64. That's still not very portable. I'm not opposed to removing the bmi2 check, but gcc also has the same check so it doesn't improve portability much. ~Craig On Sat, Dec 29, 2018 at 4:44 PM Arthur O'Dwyer via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi Pawel, > > There is the _mulx_u64 intrinsic, but it

On 05/11/2018 08:40 PM, Daniel Berlin via llvm-dev wrote: > > > On Fri, May 11, 2018 at 2:37 PM, Hiroshi Yamauchi <yamauchi at google.com > <mailto:yamauchi at google.com>> wrote: > > > > On Thu, May 10, 2018 at 12:49 PM Daniel Berlin > <dberlin at dberlin.org <mailto:dberlin at dberlin.org>> wrote: > > > > On Thu, May

On Fri, May 11, 2018 at 2:37 PM, Hiroshi Yamauchi <yamauchi at google.com> wrote: > > > On Thu, May 10, 2018 at 12:49 PM Daniel Berlin <dberlin at dberlin.org> > wrote: > >> >> >> On Thu, May 10, 2018 at 12:05 PM, Hiroshi Yamauchi <yamauchi at google.com> >> wrote: >> >>> >>> >>> On Wed, May 9, 2018 at 8:24

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