Displaying 1 result from an estimated 1 matches for "af403fcb".
2014 Sep 30
2
[LLVMdev] Behaviour of NVPTX intrinsic
The actual purpose that I wanted such an intrinsic is to solve a problem
similar to this one in X86. Say I wanted to read the "mxcsr" register(which
is the status register for SSE instructions) after a particular
instruction, then I need a kind of barrier intrinsic which will not allow
the arithmetic instructions to move around it. Or else I will be reading
the status of some other