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Hi Matthijs, On Nov 3, 2008, at 9:05 AM, Matthijs Kooijman wrote: > > Am I doing something wrong here, or is tblgen mistaken? I think you're doing something that is beyond what tblgen is currently prepared for. But it's interesting :-). Having rd and RD have explicit chain operands and results sounds like the right thing to do. This is needed to prevent them from being reordered

...is... I'd be glad to test it though :-) Gr. Matthijs -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 189 bytes Desc: Digital signature URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20081104/ae57b8d4/attachment.sig>

Hi all, I'm trying some stuff with tblgen and it is doing things I didn't expect. As for some background, I have this RD (read) instruction, which reads a value from an external output. In our architecture, we have two types of registers: buses and registers. The RD instructions puts its result on bus, while the consumer of that data wants to have it in a register. To accomplish this, a