search for: adrl

Are you sure about that? In the documentation for the ADRL pseudo it says: "ADRL assembles to two instructions, an ADRP followed by ADD." "ADRL produces position-independent code, because the address is calculated relative to PC." >From this, I'd expect ADRP to simply do Xd <- PC + n*4096, where n is a 20 bit number, just l...

Hello, I am working in an embedded environment with somewhat restrictive memory requirements where the page alignment requirements of an ADRP instruction cannot be guaranteed. With the ld program inside of the Xcode, there is a -preload flag which causes ADRP instructions to be dropped, and generates code that is 100% position independent. As near as I can determine, ld.lld does not have this

On 21 May 2018 at 13:57, Bruce Hoult via llvm-dev <llvm-dev at lists.llvm.org> wrote: > "ADRL produces position-independent code, because the address is calculated > relative to PC." > > From this, I'd expect ADRP to simply do Xd <- PC + n*4096, where n is a 20 > bit number, just like AUIPC in RISC-V (also a 20 literal multiplied by 4096) > or AUIPC in MIPS (16 bi...

...imate shortcut to a solution which doesn't involve adding a feature to the toolchain. On Mon, May 21, 2018 at 9:04 AM, Tim Northover <t.p.northover at gmail.com> wrote: > On 21 May 2018 at 13:57, Bruce Hoult via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > "ADRL produces position-independent code, because the address is > calculated > > relative to PC." > > > > From this, I'd expect ADRP to simply do Xd <- PC + n*4096, where n is a > 20 > > bit number, just like AUIPC in RISC-V (also a 20 literal multiplied by >...

...9;t involve adding a feature to the > toolchain. > > > On Mon, May 21, 2018 at 9:04 AM, Tim Northover <t.p.northover at gmail.com> > wrote: >> >> On 21 May 2018 at 13:57, Bruce Hoult via llvm-dev >> <llvm-dev at lists.llvm.org> wrote: >> > "ADRL produces position-independent code, because the address is >> > calculated >> > relative to PC." >> > >> > From this, I'd expect ADRP to simply do Xd <- PC + n*4096, where n is a >> > 20 >> > bit number, just like AUIPC in RISC-V (al...

...9;t involve adding a feature to the > toolchain. > > > On Mon, May 21, 2018 at 9:04 AM, Tim Northover <t.p.northover at gmail.com> > wrote: >> >> On 21 May 2018 at 13:57, Bruce Hoult via llvm-dev >> <llvm-dev at lists.llvm.org> wrote: >> > "ADRL produces position-independent code, because the address is >> > calculated >> > relative to PC." >> > >> > From this, I'd expect ADRP to simply do Xd <- PC + n*4096, where n is a >> > 20 >> > bit number, just like AUIPC in RISC-V (al...