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Hi, LLVMer. I use pseudo-instructions ADJCALLSTACK(DOWN | UP) to adjust call stacks, and it works well with "-O0" option. However, ADJCALLSTACK(DOWN | UP) are removed during codegen DCE pass under "-O2". What have I ignored? Thanks. -- 杨勇勇 (Yang Yong-Yong) -------------- next part -------------- An HTML attachment was scrubb...

You should set them as using/defining your stack register with : let Defs = [STACKREG], Uses = [STACKREG] in { __ YOUR INSTRUCTION __ } Marcello On 04/09/13 07:56, 杨勇勇 wrote: > I use pseudo-instructions ADJCALLSTACK(DOWN | UP) to adjust call > stacks, and it works well with "-O0" option. However, > ADJCALLSTACK(DOWN | UP) are removed during codegen DCE pass under "-O2".

> That is irrelevant. The PEI code needs to know how much stack space is > required for each call to allocate and align the stack frame properly. It > gets this info from the ADJCALLSTACK instructions. I see. Looking at PEI::calculateCalleeSavedRegisters shows that the ADJCALLSTACK instructions is used to set up MaxCallFrameSize. Adding debug prints also show that in the example code the ADJCALLSTACK argument is 4. I believe that this is the correct argument for only a 32bit integer...

> This sounds like the ADJCALLSTACK DOWN/UP 'instructions' around the call > aren't set right, or you have declared a SP offset. It doesn't look like > the ARM backend does this, so this is probably the problem. The ARM backend currently doesn't use a frame pointer. It uses the same technique of the PPC bac...

...Glue, SDNPOutGlue, SDNPVariadic]>; def my_ret : SDNode<"MyISD::RET_FLAG", SDTNone, [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; let hasCtrlDep = 1, hasSideEffects = 1, isCodeGenOnly = 1, Defs = [SP], Uses = [SP] in { def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2), [(MyCallseqStart timm:$amt1, timm:$amt2)]>; def ADJCALLSTACKUP : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),...

On Sat, 7 Oct 2006, [UTF-8] Rafael Esp?ndola wrote: >> This sounds like the ADJCALLSTACK DOWN/UP 'instructions' around the call >> aren't set right, or you have declared a SP offset. It doesn't look like >> the ARM backend does this, so this is probably the problem. > The ARM backend currently doesn't use a frame pointer. It uses the > same techn...

Hi Martin, Pseudo CALLSEQ_START was changed in r302527, commit message contains details on the changes. However CALLSEQ_END was not modified. If your made changes to ADJCALLSTACKUP to add additional argument, that may result in error. Thanks, --Serge 2017-09-15 19:09 GMT+07:00 Martin J. O'Riordan via llvm-dev < llvm-dev at lists.llvm.org>: > Hi LLVM-Devs, > > I have managed to complete updating our sources from LLVM v4.0 to v5.0, but > I am getting...

Hi LLVM-Devs, I have managed to complete updating our sources from LLVM v4.0 to v5.0, but I am getting selection errors for 'callseq_end'. I am aware that the 'ADJCALLSTACKUP' and 'ADJCALLSTACKDOWN' patterns have changed, and have added an additional argument to the TD descriptions for these. There are interactions with 'ISD::CALL' and 'ISD::RET_FLAG', but so far as I can tell I have revised these in the same way as the in-tree targets hav...

For a long time we have had code for custom lowering of adjustments to the stack pointer. But until recently we did not realise that we were handling only places that provided a fixed-value for such adjustments, and the ISD nodes 'ADJCALLSTACKDOWN' and 'ADJCALLSTACKUP' are only described in our TableGen descriptions for immediates. This hasn't previous mattered as LLVM produces valid instruction sequences for variable adjustments anyway using an intermediate register. However, we have a recent requirement to also per...

...eFrameObjectOffsets corretly computes this > correctly. > > The problem is that the alignment is computed before adding space for > the call frame size. This is done in emitProlog. Currently the ARM > backend has a bug in that it doesn't align the new stack. This sounds like the ADJCALLSTACK DOWN/UP 'instructions' around the call aren't set right, or you have declared a SP offset. It doesn't look like the ARM backend does this, so this is probably the problem. If the PEI stuff knows the right offsets, it should do the alignment for you. -Chris -- http://nondot.o...

In ARM the stack should be 8 bytes aligned during function calls. A function that has at least one function call then has a stack size of 8 bytes. PEI::calculateFrameObjectOffsets corretly computes this correctly. The problem is that the alignment is computed before adding space for the call frame size. This is done in emitProlog. Currently the ARM backend has a bug in that it doesn't align

...n via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > For a long time we have had code for custom lowering of adjustments to the stack pointer. But until recently we did not realise that we were handling only places that provided a fixed-value for such adjustments, and the ISD nodes ‘ADJCALLSTACKDOWN’ and ‘ADJCALLSTACKUP’ are only described in our TableGen descriptions for immediates. This hasn’t previous mattered as LLVM produces valid instruction sequences for variable adjustments anyway using an intermediate register. > > However, we have a recent requirement to also perform cus...

Thanks, I'll look into that. Still, the case where the function does not call anything remains---in such a situation there are no ADJCALLSTACK pseudos, so regardless of what that function you pointed at does, there won't be any target-independent information about the SP adjustment by the time the frame index elimination runs. Would it make sense to have ADJCALLSTACK pseudos every time there are objects to be allocated on the stac...

Here's the PDF version. On Thu, 2006-11-16 at 20:50 -0800, Chris Lattner wrote: > On Fri, 17 Nov 2006, [ks_c_5601-1987] "̽" wrote: > > > > The attached document contains the present issues I met while developing > > a LLVM backend emits text assembly code for a new architecture. Most of > > them are problems should be resolved. > > I sincerely ask

...IR Dump Before Prologue/Epilogue Insertion & Frame Finalization ***: > # Machine code for function main: Post SSA > Frame Objects: > fi#0: size=1024, align=4, at location [SP+4] > fi#1: size=1024, align=4, at location [SP+4] > > BB#0: derived from LLVM BB %entry > ADJCALLSTACKDOWN32 0, %ESP<imp-def>, %EFLAGS<imp-def,dead>, %ESP<imp-use> > CALLpcrel32 <ga:@bar>, <regmask>, %ESP<imp-use>, %ESP<imp-def> > ADJCALLSTACKUP32 0, 0, %ESP<imp-def>, %EFLAGS<imp-def,dead>, %ESP<imp-use> > RET...

....ll -print-before-all # *** IR Dump Before Prologue/Epilogue Insertion & Frame Finalization ***: # Machine code for function main: Post SSA Frame Objects: fi#0: size=1024, align=4, at location [SP+4] fi#1: size=1024, align=4, at location [SP+4] BB#0: derived from LLVM BB %entry ADJCALLSTACKDOWN32 0, %ESP<imp-def>, %EFLAGS<imp-def,dead>, %ESP<imp-use> CALLpcrel32 <ga:@bar>, <regmask>, %ESP<imp-use>, %ESP<imp-def> ADJCALLSTACKUP32 0, 0, %ESP<imp-def>, %EFLAGS<imp-def,dead>, %ESP<imp-use> RET # End...