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addrr
2015 Feb 19
2
[LLVMdev] ScheduleDAGInstrs computes deps using IR Values that may be invalid
...n BB#14 and BB#15:
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BB#14: derived from LLVM BB %if.end.1
Live Ins: %X16 %X17 %X18 %X7 %X0 %X6 %X4 %W8 %X15 %X14 %W3 %W2 %X1
%X10 %X11 %X12 %X13 %X9
Predecessors according to CFG: BB#12
%X5<def> = ADDXrr %X16, %X13
* %W19<def> = LDRBBui %X5, 1; mem:LD1[%scevgep95](tbaa=<0x6e02518>)
* %W3<def> = MADDWrrr %W2<kill>, %W3<kill>, %WZR
* %W2<def> = SUBWrr %W3<kill>, %W19<kill>
* STRBBui %W2<kill>, %X5<kill>, 1;
mem:ST1[%s...