Displaying 20 results from an estimated 43 matches for "addsuccessor".
2014 Dec 08
2
[LLVMdev] Virtual register problem in X86 backend
...egin(), MBB,
next(MachineBasicBlock::iterator(MI)), MBB->end());
MBB_end->transferSuccessorsAndUpdatePHIs(MBB);
// Move MBB at the right place
MBB_end->moveAfter(MBB);
MBB_erase->moveAfter(MBB);
MBB_cond->moveAfter(MBB);
// Set the new successors
MBB->addSuccessor(MBB_cond);
MBB_cond->addSuccessor(MBB_erase);
MBB_cond->addSuccessor(MBB_end);
MBB_erase->addSuccessor(MBB_cond);
MBB_erase->addSuccessor(MBB_end);
MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
const TargetRegisterClass *AddrRegClass = get...
2008 Jul 10
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
...ckList().insert(It, sinkMBB);
- // Update machine-CFG edges by transferring all successors of the current
- // block to the new block which will contain the Phi node for the select.
- sinkMBB->transferSuccessors(BB);
- // Next, add the true and fallthrough blocks as its successors.
- BB->addSuccessor(copy0MBB);
- BB->addSuccessor(sinkMBB);
-
- // copy0MBB:
- // %FalseValue = ...
- // # fallthrough to sinkMBB
- BB = copy0MBB;
-
- // Update machine-CFG edges
- BB->addSuccessor(sinkMBB);
-
- // sinkMBB:
- // %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMB...
2008 Jul 08
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
PPCTargetLowering::EmitInstrWithCustomInserter has a reference
to the current MachineFunction for other purposes. Can you use
MachineFunction::getRegInfo instead?
Dan
On Jul 8, 2008, at 1:56 PM, Gary Benson wrote:
> Would it be acceptable to change MachineInstr::getRegInfo from private
> to public so I can use it from
> PPCTargetLowering::EmitInstrWithCustomInserter?
>
>
2008 Jul 11
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
...- F->insert(It, sinkMBB);
- // Update machine-CFG edges by transferring all successors of the current
- // block to the new block which will contain the Phi node for the select.
- sinkMBB->transferSuccessors(BB);
- // Next, add the true and fallthrough blocks as its successors.
- BB->addSuccessor(copy0MBB);
- BB->addSuccessor(sinkMBB);
-
- // copy0MBB:
- // %FalseValue = ...
- // # fallthrough to sinkMBB
- BB = copy0MBB;
-
- // Update machine-CFG edges
- BB->addSuccessor(sinkMBB);
-
- // sinkMBB:
- // %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMB...
2008 Jul 11
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Hi Gary,
This does not patch cleanly for me (PPCISelLowering.cpp). Can you
prepare a updated patch?
Thanks,
Evan
On Jul 10, 2008, at 11:45 AM, Gary Benson wrote:
> Cool, that worked. New patch attached...
>
> Cheers,
> Gary
>
> Evan Cheng wrote:
>> Just cast both values to const TargetRegisterClass*.
>>
>> Evan
>>
>> On Jul 10, 2008, at 7:36
2008 Jul 10
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Just cast both values to const TargetRegisterClass*.
Evan
On Jul 10, 2008, at 7:36 AM, Gary Benson wrote:
> Evan Cheng wrote:
>> How about?
>>
>> const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass :
>> &PPC:G8RCRegClass;
>> unsigned TmpReg = RegInfo.createVirtualRegister(RC);
>
> I tried something like that yesterday:
>
> const
2008 Jul 10
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Evan Cheng wrote:
> How about?
>
> const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass :
> &PPC:G8RCRegClass;
> unsigned TmpReg = RegInfo.createVirtualRegister(RC);
I tried something like that yesterday:
const TargetRegisterClass *RC =
is64bit ? &PPC::GPRCRegClass : &PPC::G8RCRegClass;
but I kept getting this error no matter how I arranged it:
2008 Jun 30
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
You need to insert new basic blocks and update CFG to accomplish this.
There is a hackish way to do this right now. Add a pseudo instruction
to represent this operation and mark it usesCustomDAGSchedInserter.
This means the intrinsic is mapped to a single (pseudo) node. But it
is then expanded into instructions that can span multiple basic
blocks. See
2008 Jul 09
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
...ckList().insert(It, sinkMBB);
- // Update machine-CFG edges by transferring all successors of the current
- // block to the new block which will contain the Phi node for the select.
- sinkMBB->transferSuccessors(BB);
- // Next, add the true and fallthrough blocks as its successors.
- BB->addSuccessor(copy0MBB);
- BB->addSuccessor(sinkMBB);
-
- // copy0MBB:
- // %FalseValue = ...
- // # fallthrough to sinkMBB
- BB = copy0MBB;
-
- // Update machine-CFG edges
- BB->addSuccessor(sinkMBB);
-
- // sinkMBB:
- // %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMB...
2008 Jul 08
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Would it be acceptable to change MachineInstr::getRegInfo from private
to public so I can use it from PPCTargetLowering::EmitInstrWithCustomInserter?
Cheers,
Gary
Evan Cheng wrote:
> Look for createVirtualRegister. These are examples in
> PPCISelLowering.cpp.
>
> Evan
> On Jul 8, 2008, at 8:24 AM, Gary Benson wrote:
>
> > Hi Evan,
> >
> > Evan Cheng wrote:
2008 Jun 30
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Chris Lattner wrote:
> On Jun 27, 2008, at 8:27 AM, Gary Benson wrote:
> > def CMP_UNRESw : Pseudo<(outs), (ins GPRC:$rA, GPRC:$rB, i32imm:
> > $label),
> > "cmpw $rA, $rB\n\tbne- La${label}_exit",
> > [(PPCcmp_unres GPRC:$rA, GPRC:$rB, imm:
> > $label)]>;
> > }
> >
> > ...and
2008 Jul 02
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
...ckList().insert(It, sinkMBB);
- // Update machine-CFG edges by transferring all successors of the current
- // block to the new block which will contain the Phi node for the select.
- sinkMBB->transferSuccessors(BB);
- // Next, add the true and fallthrough blocks as its successors.
- BB->addSuccessor(copy0MBB);
- BB->addSuccessor(sinkMBB);
-
- // copy0MBB:
- // %FalseValue = ...
- // # fallthrough to sinkMBB
- BB = copy0MBB;
-
- // Update machine-CFG edges
- BB->addSuccessor(sinkMBB);
-
- // sinkMBB:
- // %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMB...
2013 Feb 18
1
[LLVMdev] splitting a branch within a pseudo
...cessor edges to sinkMBB.
sinkMBB->splice(sinkMBB->begin(), BB,
llvm::next(MachineBasicBlock::iterator(MI)),
BB->end());
sinkMBB->transferSuccessorsAndUpdatePHIs(BB);
// Next, add the true and fallthrough blocks as its successors.
BB->addSuccessor(copy0MBB);
BB->addSuccessor(sinkMBB);
// Emit the right instruction according to the type of the operands
compared
if (isFPCmp)
BuildMI(BB, dl, TII->get(Opc)).addMBB(sinkMBB);
else
BuildMI(BB, dl, TII->get(Opc)).addReg(MI->getOperand(2).getReg())
.addReg(M...
2014 Oct 28
2
[LLVMdev] Problem in X86 backend (again)
...B_end->splice(MBB_end->begin(), MBB, next(MachineBasicBlock::iterator(MI)), MBB->end());
MBB_end->transferSuccessorsAndUpdatePHIs(MBB);
// Move MBB at the right place
MBB_end->moveAfter(MBB);
MBB_erase->moveAfter(MBB);
MBB_cond->moveAfter(MBB);
// Set the new successors
MBB->addSuccessor(MBB_cond);
MBB_erase->addSuccessor(MBB_cond);
MBB_cond->addSuccessor(MBB_end);
MBB_cond->addSuccessor(MBB_erase);
MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
const TargetRegisterClass *AddrRegClass = getRegClassFor(MVT::i64);
unsigned reg = MRI.createVirtualRegiste...
2014 Dec 10
2
[LLVMdev] Virtual register problem in X86 backend
...> MBB_end->transferSuccessorsAndUpdatePHIs(MBB);
>>
>> // Move MBB at the right place
>> MBB_end->moveAfter(MBB);
>> MBB_erase->moveAfter(MBB);
>> MBB_cond->moveAfter(MBB);
>>
>> // Set the new successors
>> MBB->addSuccessor(MBB_cond);
>> MBB_cond->addSuccessor(MBB_erase);
>> MBB_cond->addSuccessor(MBB_end);
>> MBB_erase->addSuccessor(MBB_cond);
>> MBB_erase->addSuccessor(MBB_end);
>>
>> MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
&...
2006 Jul 05
0
[LLVMdev] Critical edges
...oval_Fer::split_critical_edge
(MachineBasicBlock & src, MachineBasicBlock & dst, MachineFunction & mf) {
const BasicBlock * src_bb = src.getBasicBlock();
const BasicBlock * dst_bb = dst.getBasicBlock();
MachineBasicBlock * crit_mbb = new MachineBasicBlock(src_bb);
src.addSuccessor(crit_mbb);
crit_mbb->addSuccessor(& dst);
src.removeSuccessor(& dst);
ilist<MachineBasicBlock>::iterator mbb_it = mf.getLastBlock();
++mbb_it;
mf.getBasicBlockList().insert(mbb_it, crit_mbb);
}
2006 Jul 09
2
[LLVMdev] Critical edges
...dgeRemoval_Fer::split_critical_edge
(MachineBasicBlock & src, MachineBasicBlock & dst, MachineFunction &
mf) {
const BasicBlock * src_bb = src.getBasicBlock();
MachineBasicBlock * crit_mbb = new MachineBasicBlock(src_bb);
/// modify the llvm control flow graph
src.addSuccessor(crit_mbb);
crit_mbb->addSuccessor(& dst);
src.removeSuccessor(& dst);
/// insert the new block into the machine function.
ilist<MachineBasicBlock>::iterator mbb_it = mf.getLastBlock();
++mbb_it;
mf.getBasicBlockList().insert(mbb_it, crit_mbb);
/// inse...
2013 Feb 18
0
[LLVMdev] splitting a branch within a pseudo
...cessor edges to sinkMBB.
sinkMBB->splice(sinkMBB->begin(), BB,
llvm::next(MachineBasicBlock::iterator(MI)),
BB->end());
sinkMBB->transferSuccessorsAndUpdatePHIs(BB);
// Next, add the true and fallthrough blocks as its successors.
BB->addSuccessor(copy0MBB);
BB->a
On 02/17/2013 12:51 PM, Reed Kotler wrote:
> After discussions last night, I'm leaning towards going legit with all
> my pseudo expansions in Mips 16.
>
> Some I think I can clearly do by just putting in the proper side effects
> of implicit registers (T8 t...
2006 Jul 04
2
[LLVMdev] Critical edges
On Tue, 4 Jul 2006, Fernando Magno Quintao Pereira wrote:
> However, it does not remove all the critical edges. I am getting a very
> weird dataflow graph (even without the Break Critical edges pass). The
> dataflow generated by MachineFunction::dump() for the program below is
> given here:
> http://compilers.cs.ucla.edu/fernando/projects/soc/images/loop_no_crit2.pdf
...
> The
2008 Oct 14
3
[LLVMdev] CFG modifcations and code gen
...gets printed between blocks 3 and 5. This obviously is not what
the CFG is saying it should be done. The code I'm using to do this
transformation, which takes 2 & 4 and places them after block 5 is:
MachineBasicBlock* newExitPath = findLowestNumSuccBB(root);
pHigh->addSuccessor(newExitPath);
root->removeSuccessor(newExitPath);
root->CorrectExtraCFGEdges(*root->succ_begin(), NULL,
false);
pHigh->CorrectExtraCFGEdges(*pHigh->succ_begin(),
newExitPath, false);
newExitPath->moveAfter(pHigh);...