search for: addssrr

...or X86ISD::INSERTPS depending on the target's SSE feature level. To start I checked if this bug was caused simply by the lack of specific tablegen patterns to match the complex sequence described above into a single ADDSS instruction. However X86InstrSSE.td already defines an instruction X86::ADDSSrr as a commutative SSE scalar fp add instruction (that works on F32 ValueTypes). Instruction X86::ADDSSrr is used to select 'fadd' nodes and it will be translated to 'addss' in assembly. At this stage, the MOVSS/INSERTPS is still required since the ADDSS alone would not be equivalent...

...on the target's SSE feature level. > > To start I checked if this bug was caused simply by the lack of > specific tablegen patterns to match the complex sequence described > above into a single ADDSS instruction. > > However X86InstrSSE.td already defines an instruction X86::ADDSSrr as > a commutative SSE scalar fp add instruction (that works on F32 > ValueTypes). Instruction X86::ADDSSrr is used to select 'fadd' nodes > and it will be translated to 'addss' in assembly. > > At this stage, the MOVSS/INSERTPS is still required since the ADDSS >...