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I don’t quite follow why you are doing something like this. What is the advantage of this instead of just attaching the AddrRegs regsister class as the register class for your instruction? So that you would have an ADD instruction like %AddrRegOut = ADD %AddrRegIn1, %AddrRegIn2 What kind of problematic regalloc are you trying to avoid with introducing a new backend data type? Marcello > On 25 May 2016, at 19:07, Lawrence, Peter via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Quentin, > My real problem...

...ev at lists.llvm.org> wrote: > I don’t quite follow why you are doing something like this. > > What is the advantage of this instead of just attaching the AddrRegs > regsister class as the register class for your instruction? > So that you would have an ADD instruction like > %AddrRegOut = ADD %AddrRegIn1, %AddrRegIn2 > > What kind of problematic regalloc are you trying to avoid with introducing > a new backend data type? > > Marcello > > On 25 May 2016, at 19:07, Lawrence, Peter via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > Quentin, &g...

Quentin, My real problem is that my target has separate address and data registers. The way I’d like to try getting better reg-alloc than I am now is to bring out the difference as Early as possible, so I have added p16, p32, p64 to the enum in “MachineValueType.h” And I have called addRegisterClass(MVT::p32, &XyzAddrRegsRegClass); And I have an override for virtual

....llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote: I don’t quite follow why you are doing something like this. What is the advantage of this instead of just attaching the AddrRegs regsister class as the register class for your instruction? So that you would have an ADD instruction like %AddrRegOut = ADD %AddrRegIn1, %AddrRegIn2 What kind of problematic regalloc are you trying to avoid with introducing a new backend data type? Marcello On 25 May 2016, at 19:07, Lawrence, Peter via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote: Quentin,...

...wrote: > > I don’t quite follow why you are doing something like this. > > > > What is the advantage of this instead of just attaching the AddrRegs > regsister class as the register class for your instruction? > > So that you would have an ADD instruction like > > %AddrRegOut = ADD %AddrRegIn1, %AddrRegIn2 > > > > What kind of problematic regalloc are you trying to avoid with introducing > a new backend data type? > > > > Marcello > > On 25 May 2016, at 19:07, Lawrence, Peter via llvm-dev < > llvm-dev at lists.llvm.org> wrote: &...