Displaying 5 results from an estimated 5 matches for "addrregin2".
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addrregin1
2016 May 26
0
dumb question about tblgen
I don’t quite follow why you are doing something like this.
What is the advantage of this instead of just attaching the AddrRegs regsister class as the register class for your instruction?
So that you would have an ADD instruction like
%AddrRegOut = ADD %AddrRegIn1, %AddrRegIn2
What kind of problematic regalloc are you trying to avoid with introducing a new backend data type?
Marcello
> On 25 May 2016, at 19:07, Lawrence, Peter via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> Quentin,
> My real problem is that my target has separate...
2016 May 26
2
dumb question about tblgen
...> I don’t quite follow why you are doing something like this.
>
> What is the advantage of this instead of just attaching the AddrRegs
> regsister class as the register class for your instruction?
> So that you would have an ADD instruction like
> %AddrRegOut = ADD %AddrRegIn1, %AddrRegIn2
>
> What kind of problematic regalloc are you trying to avoid with introducing
> a new backend data type?
>
> Marcello
>
> On 25 May 2016, at 19:07, Lawrence, Peter via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
> Quentin,
> My real proble...
2016 May 26
3
dumb question about tblgen
Quentin,
My real problem is that my target has separate address and data registers.
The way I’d like to try getting better reg-alloc than I am now is to bring out the difference as
Early as possible, so I have added p16, p32, p64 to the enum in “MachineValueType.h”
And I have called addRegisterClass(MVT::p32, &XyzAddrRegsRegClass);
And I have an override for virtual
2016 May 26
0
dumb question about tblgen
...lists.llvm.org>> wrote:
I don’t quite follow why you are doing something like this.
What is the advantage of this instead of just attaching the AddrRegs regsister class as the register class for your instruction?
So that you would have an ADD instruction like
%AddrRegOut = ADD %AddrRegIn1, %AddrRegIn2
What kind of problematic regalloc are you trying to avoid with introducing a new backend data type?
Marcello
On 25 May 2016, at 19:07, Lawrence, Peter via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote:
Quentin,
My real problem is that my...
2016 May 26
1
dumb question about tblgen
...follow why you are doing something like this.
>
>
>
> What is the advantage of this instead of just attaching the AddrRegs
> regsister class as the register class for your instruction?
>
> So that you would have an ADD instruction like
>
> %AddrRegOut = ADD %AddrRegIn1, %AddrRegIn2
>
>
>
> What kind of problematic regalloc are you trying to avoid with introducing
> a new backend data type?
>
>
>
> Marcello
>
> On 25 May 2016, at 19:07, Lawrence, Peter via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
>
>
> Quentin,
>...