Displaying 3 results from an estimated 3 matches for "addressi".
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2006 Jun 27
0
[LLVMdev] Mapping bytecode to X86
...You can't join the first and third operand.
Note that the 2-addr pass does all of the above for you, but it does
destroy SSA.
-Chris
> Thanks a lot,
>
> Fernando
>
>> On Mon, 26 Jun 2006, Fernando Magno Quintao Pereira wrote:
>>> The problem is that, after the TwoAddressInstructionPass is used, the
>>> code is no longer in SSA form, and my register allocator rely on
>>> some SSA properties. I am using the Spiller in VirtRegMap.* to generate
>>> the code, but the incorrect mapping still happens when I invoke the
>>> setReg() method...
2004 Dec 03
2
[LLVMdev] Adding xadd instruction to X86
Chris Lattner wrote:
> On Thu, 2 Dec 2004, Brent Monroe wrote:
>
>>I'm trying to add the xadd instruction to the X86 back end.
>>xadd r/m32, r32
>>exchanges r/m32 and r32, and loads the sum into r/m32. I'm
>>interested in the case where the destination operand is a
>>memory location.
>>
>>I've added the following entry to
2006 Jun 27
2
[LLVMdev] Mapping bytecode to X86
...:= c
2) a := a op c --> a := c
3) a := b op a --> a := a op b --> a := b (???)
What if the operation in (3) is non-commutative?
Thanks a lot,
Fernando
> On Mon, 26 Jun 2006, Fernando Magno Quintao Pereira wrote:
> > The problem is that, after the TwoAddressInstructionPass is used, the
> > code is no longer in SSA form, and my register allocator rely on
> > some SSA properties. I am using the Spiller in VirtRegMap.* to generate
> > the code, but the incorrect mapping still happens when I invoke the
> > setReg() method directly on...