Displaying 2 results from an estimated 2 matches for "addoaa".
2005 Dec 13
3
[LLVMdev] The live interval of write-only registers
...joined with any other registers.
The only way I know to do this is defining several instruction
'templates' for an opcode (of course automatically generated by a
script) similar to the x86 code generator in LLVM:
InstrInfo.td:
// ORC: output register class
// TRC: temp register class
def ADDoaa : Inst<0x1234, (ops ORC:$dest, TRC:$src0, $TRC:src1), "add
$dest, $src0, $src1)
The letters (oaa) postfixed to the opcode (ADD) is the template. In
this way the output register won't be joined because they are of
different register classes.
However, the problem with the method is that...
2005 Dec 13
0
[LLVMdev] The live interval of write-only registers
...only way I know to do this is defining several instruction
> 'templates' for an opcode (of course automatically generated by a
> script) similar to the x86 code generator in LLVM:
>
> InstrInfo.td:
> // ORC: output register class
> // TRC: temp register class
>
> def ADDoaa : Inst<0x1234, (ops ORC:$dest, TRC:$src0, $TRC:src1), "add
> $dest, $src0, $src1)
>
> The letters (oaa) postfixed to the opcode (ADD) is the template. In
> this way the output register won't be joined because they are of
> different register classes.
Yes. Following the...