Displaying 3 results from an estimated 3 matches for "addnw".
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2015 Sep 08
2
UB and known bits
...ts. These rules fire on
examples like the ones below. Do we have a set of rules that clients of
known bits need to follow to avoid unsoundness? I remember Nuno and/or
David Majnemer saying something about this but I don't have it handy.
John
%0:i32 = var
%1:i32 = lshr %0, 1:i32
%2:i32 = addnw 1:i32, %1
infer %2
known from Souper: xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
known from compiler: 0xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
llvm is stronger
%0:i32 = var (000000000000000xxxxxxxxxxxxxxxxx)
%1:i32 = and 65535:i32, %0
%2:i16 = var
%3:i32 = zext %2
%4:i32 = mulnw %1, %3
infer %4
known from Sou...
2015 Jul 23
0
[LLVMdev] some superoptimizer results
...then
reducing the input sequence to a single CMP is a win. If the input contain
a shift-imm, then reducing the entire sequence to a shift-imm ("absorbing"
into it) is a win. Maybe there is a generalization of this intuition to
multiple-instruction result sequences?
%0:i32 = var
%1:i32 = addnw 1:i32, %0
%2:i32 = shl 1:i32, %1
infer %2
%3:i32 = shl 2:i32, %0
result %3
%0:i8 = var
%1:i1 = ult 191:i8, %0
%2:i1 = slt 255:i8, %0
%3:i1 = or %1, %2
infer %3
%4:i1 = sle 192:i8, %0
result %4
%0:i32 = var
%1:i32 = shlnsw %0, 1:i32
%2:i32 = or 1:i32, %1
%3:i1 = slt %1, %2
infer %3
result 1:i1
&q...
2015 Jul 23
3
[LLVMdev] some superoptimizer results
> Interesting. Do you happen to have some examples laying around?
Sorry, no, I'll have to re-run. I felt that the select-heavy results were
sort of humorous and clever at first, but then just annoying.
> Except for decode-limited situations, in general decreasing the critical path length is more important
> than eliminating instructions. The critical path length is a